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參數(shù)資料
| 型號： | AD9958BCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 2-Channel 500 MSPS DDS with 10-Bit DACs |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FREE, MO-220-VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 30/40頁 |
| 文件大小： | 1051K |
| 代理商： | AD9958BCPZ |
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AD9958
Rev. 0 | Page 30 of 40
t
DV
t
DV
CS
SCLK
SDIO
SDO (SDIO_2)
SYMBOL
DEFINITION
MIN
DATA VALID TIME
12ns
0
Figure 41. Timing Diagram for Data Read for Serial I/O Port
INSTRUCTION BYTE DESCRIPTION
The instruction byte contains the following information.
Table 25.
MSB
D6
D5
D4
R/Wb
x
1
x
1
A4
D3
A3
D2
A2
D1
A1
LSB
A0
1
x = don’t care bit.
Bit 7 of the instruction byte (R/Wb) determines whether a read
or write data transfer occurs after the instruction byte write. A
logic high indicates a read operation. Logic 0 indicates a write
operation.
Bits 4 to 0 of the instruction byte determine which register is
accessed during the data transfer portion of the
communications cycle. The internal byte addresses are
generated by the AD9958.
SERIAL I/O PORT PIN DESCRIPTION
Serial Data Clock (SCLK). The serial clock pin is used to
synchronize data to and from the internal state machines of the
AD9958. The maximum SCLK toggle frequency is 200 MHz.
Chip Select (CS). The chip select pin allows more than one
AD9958 device to be on the same set of serial communications
lines. The chip select is an active low enable pin. Defined SDIO
inputs go to a high impedance state when CS is high. If CS is
driven high during any communications cycle, that cycle is
suspended until CS is reactivated low. The CS pin can be tied
low in systems that maintain control of SCLK.
Serial Data I/O (SDIO_0:3). Of the four SDIO pins, only the
SDIO_0 pin is a dedicated SDIO pin. SDIO_1:3 can also be used
to RU/RD the output amplitude. Bits <2:1> in the channel select
register (CSR Register 0x00) control the configuration of these
pins. See the Serial I/O Modes of Operation section for more
information.
SERIAL I/O PORT FUNCTION DESCRIPTION
Serial Data Out (SDO). The SDO function is available in single-
bit (3-wire) mode only. In SDO mode, data is read from the
SDIO_2 pin for protocols that use separate lines for trans-
mitting and receiving data (see Table 26 for pin configuration
options). Bits <2:1> in the CSR register (Register 0x00) control
the configuration of this pin. The SDO function is not available
in 2-bit or 4-bit serial I/O modes.
SYNC_I/O. The SYNC_I/O function is available in 1-bit and
2-bit modes. SDIO_3 serves as the SYNC_I/O pin when this
function is active. Bits <2:1> in the CSR register (Register 0x00)
control the configuration of this pin. Otherwise the SYNC_I/O
function is used to synchronize the I/O port state machines
without affecting the addressable register contents. An active
high input on the SYNC_I/O (SDIO_3) pin causes the current
communication cycle to abort. After SDIO_3 returns low
(Logic 0), another communication cycle can begin, starting
with the instruction byte write. The SYNC_I/O function is not
available in 4-bit serial I/O mode.
MSB/LSB TRANSFER DESCRIPTION
The AD9958 serial port can support both MSB-first or LSB-first
data formats. This functionality is controlled by CSR <0> in the
channel select register (CSR). MSB-first is the default mode.
When CSR <0> is set high, the serial port is in LSB-first format.
The instruction byte must be written in the format indicated by
CSR <0>. That is, if the AD9958 is in LSB-first mode, the
instruction byte must be written from LSB to MSB. If the
AD9958 is in MSB-first mode (default), the instruction byte
must be written from MSB to LSB.
Example Operation
To write the Function Register 1 (FR1) in MSB-first format,
apply an instruction byte of MSB > 00000001 < LSB, starting
with the MSB. From this instruction, the internal controller
recognizes a write transfer of three bytes starting with the MSB,
Bit <23>, in the FR1 address (Register 0x01). Bytes are written
on each consecutive rising SCLK edge until Bit<0> is
transferred. Once the last data bit is written, the I/O
communication cycle is complete and the next byte is
considered an instruction byte.
To write the Function Register 1 (FR1) in LSB-first format,
apply an instruction byte of MSB > 00000001 < LSB, starting
with the LSB. From this instruction, the internal controller
recognizes a write transfer of three bytes, starting with the
LSB <0> in the FR1 address (0x01). Bytes are written on each
consecutive rising SCLK edge until Bit <23> is transferred.
Once the last data bit is written, the I/O communication cycle is
complete and the next byte is considered an instruction byte.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AD9958BCPZ-REEL7 | 功能描述:IC DDS DUAL 10BIT DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9959 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4 Channel 500MSPS DDS with 10-bit DACs |
| AD9959/PCBZ | 功能描述:BOARD EVALUATION FOR AD9959 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9959/PCBZ | 制造商:Analog Devices 功能描述:AD9959, DDS, DAC, GUI, USB, EVALUATION B |
| AD9959/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs |
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