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參數(shù)資料
| 型號： | AD9958 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2-Channel 500 MSPS DDS with 10-Bit DACs |
| 中文描述： | 雙通道500 MSPS的DDS的10位DAC |
| 文件頁數(shù)： | 18/40頁 |
| 文件大?。?/td> | 1051K |
| 代理商： | AD9958 |
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AD9958
MODES OF OPERATION
There are many combinations of modes (for example, single-
tone, modulation, linear sweep) that the AD9958 can perform
simultaneously. However, some modes require multiple data
pins, which can impose limitations. The following guidelines
can help determine if a specific combination of modes can be
performed simultaneously by the AD9958.
Note the SYNC_CLK must be enabled in all modes except
single-tone mode.
CHANNEL CONSTRAINT GUIDELINES
1.
Single tone generation, 2-level modulation, and linear
sweep modes can be enabled on either channel and in any
combination simultaneously.
Rev. 0 | Page 18 of 40
2.
Both channels can perform 4-level modulation
simultaneously.
3.
Either channel can perform 8-level or 16-level modulation.
The other channel can only be in single-tone mode.
4.
The RU/RD function can be used on both channels in
single-tone generation mode. See the Output Amplitude
Control Mode section for the RU/RD function.
5.
When Profile Pins P2 and P3 are used for RU/RD, either
channel can perform 2-level modulation with RU/RD or
both channels can perform linear frequency or phase
sweep with RU/RD.
6.
When Profile Pin P3 is used for RU/RD, either channel can
be used in 8-level modulation with RU/RD. The other
channel can only be in single-tone generation mode.
7.
When SDIO_1:3 pins are used for RU/RD, either or both
channels can perform 2-level modulation with RU/RD. If
one channel is not in 2-level modulation it can only be in
single-tone generation mode.
8.
When the SDIO_1:3 pins are used for RU/RD, either or
both channels can perform 4-level modulation with
RU/RD. If one channel is not in 4-level modulation it can
only be in single-tone generation mode.
9.
When the SDIO_1:3 pins are used for RU/RD, either
channel can perform 8-level modulation with RU/RD. The
other channel can only be in single-tone generation mode.
10.
When the SDIO_1:3 pins are used for RU/RD, either
channel can perform 16-level modulation with RU/RD.
The other channel can only be in single-tone generation
mode.
11.
Amplitude modulation, linear amplitude sweep modes,
and the RU/RD function cannot operate simultaneously,
but frequency and phase modulation can operate
simultaneously with the RU/RD function.
POWER SUPPLIES
The AVDD and DVDD supply pins provide power to the DDS
core and supporting analog circuitry. These pins connect to a
1.8 V nominal power supply.
The DVDD_I/O pin connects to a 3.3 V nominal power
supply. All digital inputs are 3.3 V logic except for the
CLK_MODE_SEL input. The CLK_MODE_SEL (Pin 24) is
an analog input and should be operated by 1.8 V logic.
SINGLE-TONE MODE
Single-tone mode is the default mode of operation after a
master reset signal. In this mode, both DDS channels share a
common address location for the frequency tuning word
(Register 0x04) and phase offset word address location
(Register 0x05). Channel enable bits are provided in combi-
nation with these shared addresses. As a result, the frequency
tuning word and/or phase offset word can be independently
programmed between channels (see the following Step 1
through Step 5). The channel enable bits do not require an I/O
update to enable or disable a channel.
See the Register Map section for a description of the channel
enable bits in the channel select register or CSR (Register 0x00).
The channel enable bits are enabled or disabled immediately
after the CSR’s data byte is written.
Address sharing enables channels to be written simultaneously,
if desired. The default state enables all channel enable bits.
Therefore, the frequency tuning word and/or phase offset word
is common to both channels, but written only once through the
serial I/O port.
The following steps present a basic protocol to program a
different frequency tuning word and/or phase offset word for
each channel using the channel enable bits.
1.
Power up DUT and issue a master reset. A master reset
places the part in single-tone mode and single-bit mode for
serial programming operations (refer to the Serial I/O
Modes of Operation section). Frequency tuning words and
phase offset words default to 0 at this point.
2.
Enable only one channel enable bit (Register 0x00), disable
the other channel enable bit.
3.
Using the serial I/O port, program the desired frequency
tuning word (Register 0x04) and/or the phase offset word
(Register 0x05) for the enabled channel.
4.
Repeat Step 2 and Step 3 for each channel.
5.
Send an I/O update signal. After an I/O update, both
channels should output their programmed frequency
and/or phase offset value.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9958 PCB | 制造商:Analog Devices 功能描述:EVAL BOARD ((NS)) |
| AD9958/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS |
| AD9958/PCBZ | 功能描述:BOARD EVALUATION FOR AD9958 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9958/PCBZ | 制造商:Analog Devices 功能描述:EVAL BOARD, AD9958 DIRECT DIGITAL SYNTHE |
| AD9958_08 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel, 500 MSPS DDS with 10-Bit DACs |
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