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參數(shù)資料
| 型號： | AD9957BSVZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | ROHS COMPLIANT, MS-026AED-HD, TQFP-100 |
| 文件頁數(shù)： | 10/60頁 |
| 文件大?。?/td> | 840K |
| 代理商： | AD9957BSVZ-REEL |
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AD9957
Pin No.
59
Rev. 0 | Page 10 of 60
Mnemonic
I/O_UPDATE
I/O
1
I
Description
Input/Output Update; Digital Input Or Output (Active High) Depending on the Internal I/O
Update Active Bit. A high on this pin indicates a transfer of the contents of the I/O buffers
to the corresponding internal registers.
Output Shift Keying, Digital Input (Active High). When using OSK (manual or automatic),
this pin controls the OSK function. See the Output Shift Keying (OSK) section of the data
sheet for details. When not using OSK, tie this pin high.
Serial Data Input/Output, Digital Input/Output (Active High). This pin can be either
unidirectional or bidirectional (default), depending on configuration settings. In
bidirectional serial port mode, this pin acts as the serial data input and output. In
unidirectional, it is an input only.
Serial Data Output, Digital Output (Active High). This pin is only active in unidirectional
serial data mode. In this mode, it functions as the output. In bidirectional mode, this pin is
not operational and should be left floating.
Serial Data Clock. Digital clock (rising edge on write, falling edge on read). This pin
provides the serial data clock for the control data path. Write operations to the AD9957
use the rising edge. Readback operations from the AD9957 use the falling edge.
Chip Select, Digital Input (Active Low). Bringing this pin low enables the AD9957 to detect
serial clock rising/falling edges. Bringing this pin high causes the AD9957 to ignore input
on the serial data pins.
Input/Output Reset, Digital Input (Active High). Rather than resetting the entire device
during a failed communication cycle, when brought high, this pin resets the state
machine of the serial port controller and clears any I/O buffers that have been written
since the last I/O update. When unused, tie this pin to ground to avoid accidental resets.
Open Source DAC Complementary Output Source. Analog output, current mode. Connect
through 50 Ω to AGND.
Open Source DAC Output Source. Analog output, current mode. Connect through 50 Ω to
AGND.
Analog Reference Pin. This pin programs the DAC output full-scale reference current.
Attach a 10 kΩ resistor to AGND.
Reference Clock Input. Analog input. See the REFCLK Overview section for more details.
Complementary Reference Clock Input. Analog input. See the REFCLK Overview section
for more details.
Reference Clock Output. Analog output. See the REFCLK Overview section for more
details.
Crystal Select. See the REFCLK Overview section for more details.
60
OSK
I
67
SDIO
I/O
68
SDO
O
69
SCLK
O
70
CS
I
71
I/O_RESET
I
80
IOUT
O
81
IOUT
O
84
DAC_RSET
O
90
91
REF_CLK
REF_CLK
I
I
94
REFCLK_OUT
O
95
1
I = input, O = output.
XTAL_SEL
O
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相關代理商/技術參數(shù) |
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| AD9957BSVZREEL13 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
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| AD9958 PCB | 制造商:Analog Devices 功能描述:EVAL BOARD ((NS)) |
| AD9958/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS |
| AD9958/PCBZ | 功能描述:BOARD EVALUATION FOR AD9958 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
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