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參數(shù)資料
| 型號： | AD9925 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| 中文描述： | CCD信號處理器垂直驅(qū)動器和精密時序發(fā)生器 |
| 文件頁數(shù)： | 91/96頁 |
| 文件大小： | 1447K |
| 代理商： | AD9925 |
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AD9925
Table 85. XV7 and XV8 Vertical Sequence 1 Registers
Address Data Bit Content Default Value Register Name
54
[0]
[11:1]
[23:12]
X
55
[11:0]
[23:12]
X
56
[0]
[23:1]
X
57
[23:0]
X
Rev. A | Page 91 of 96
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_1
UNUSED
XV78START_1
XV78REPO_1
XV78REPE_1
XV78HOLDEN_1
UNUSED
UNUSED
X
X
Table 86. XV7 and XV8 Vertical Sequence 2 Registers
Address Data Bit Content Default Value Register Name
58
[0]
[11:1]
[23:12]
X
59
[11:0]
[23:12]
X
5A
[0]
[23:1]
X
5B
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_2
UNUSED
XV78START_2
XV78REPO_2
XV78REPE_2
XV78HOLDEN_2
UNUSED
UNUSED
X
X
Table 87. XV7 and XV8 Vertical Sequence 3 Registers
Address Data Bit Content Default Value Register Name
5C
[0]
[11:1]
[23:12]
X
5D
[11:0]
[23:12]
X
5E
[0]
[23:1]
X
5F
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_3
UNUSED
XV78START_3
XV78REPO_3
XV78REPE_3
XV78HOLDEN_3
UNUSED
UNUSED
X
X
Table 88. XV7 and XV8 Vertical Sequence 4 Registers
Address Data Bit Content Default Value Register Name
60
[0]
[11:1]
[23:12]
X
61
[11:0]
[23:12]
X
62
[0]
[23:1]
X
63
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_4
UNUSED
XV78START_4
XV78REPO_4
XV78REPE_4
XV78HOLDEN_4
UNUSED
UNUSED
X
X
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PDF描述 |
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| AD9925BBCZ | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| AD9927 | 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator |
| AD9927BBCZ | 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator |
| AD9927BBCZRL | 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9925BBCZ | 制造商:Analog Devices 功能描述:IC 12-BIT SIGNAL PROCESSOR |
| AD9925BBCZRL | 制造商:Analog Devices 功能描述:IC 12-BIT SIGNAL PROCESSOR |
| AD9925KBCZ | 制造商:Analog Devices 功能描述:12 BIT, 36 MSPS CCD SIGNAL PROCESSOR W/VERTICAL DRIVER - Bulk |
| AD9926BBCZ | 制造商:Analog Devices 功能描述: |
| AD9926BBCZRL | 制造商:Analog Devices 功能描述: |
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