參數(shù)資料
型號(hào)： AD9920ABBCZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/112頁(yè)
文件大?。?/td> 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
電壓 - 電源，模擬： 1.6 V ~ 2 V
電壓 - 電源，數(shù)字： 1.6 V ~ 2 V
封裝/外殼： 105-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 105-CSPBGA（8x8）
包裝： 管件
AD9920A
Rev. B | Page 104 of 112
Address
Data
Bits
Default
Value
Update
Type
Name
Description
0x9E
[12:0]
0
VD
GP6_TOG3_PX
General-Purpose Signal 6, third toggle position, pixel location.
[25:13]
0
GP6_TOG4_FD
General-Purpose Signal 6, fourth toggle position, field location.
0x9F
[12:0]
0
VD
GP6_TOG4_LN
General-Purpose Signal 6, fourth toggle position, line location.
[25:13]
0
GP6_TOG4_PX
General-Purpose Signal 6, fourth toggle position, pixel location.
0xA0
[12:0]
0
VD
GP7_TOG1_FD
General-Purpose Signal 7, first toggle position, field location.
[25:13]
0
GP7_TOG1_LN
General-Purpose Signal 7, first toggle position, line location.
0xA1
[12:0]
0
VD
GP7_TOG1_PX
General-Purpose Signal 7, first toggle position, pixel location.
[25:13]
0
GP7_TOG2_FD
General-Purpose Signal 7, second toggle position, field location.
0xA2
[12:0]
0
VD
GP7_TOG2_LN
General-Purpose Signal 7, second toggle position, line location.
[25:13]
0
GP7_TOG2_PX
General-Purpose Signal 7, second toggle position, pixel location.
0xA3
[12:0]
0
VD
GP7_TOG3_FD
General-Purpose Signal 7, third toggle position, field location.
[25:13]
0
GP7_TOG3_LN
General-Purpose Signal 7, third toggle position, line location.
0xA4
[12:0]
0
VD
GP7_TOG3_PX
General-Purpose Signal 7, third toggle position, pixel location.
[25:13]
0
GP7_TOG4_FD
General-Purpose Signal 7, fourth toggle position, field location.
0xA5
[12:0]
0
VD
GP7_TOG4_LN
General-Purpose Signal 7, fourth toggle position, line location.
[25:13]
0
GP7_TOG4_PX
General-Purpose Signal 7, fourth toggle position, pixel location.
0xA6
[12:0]
0
VD
GP8_TOG1_FD
General-Purpose Signal 8, first toggle position, field location.
[25:13]
0
GP8_TOG1_LN
General-Purpose Signal 8, first toggle position, line location.
0xA7
[12:0]
0
VD
GP8_TOG1_PX
General-Purpose Signal 8, first toggle position, pixel location.
[25:13]
0
GP8_TOG2_FD
General-Purpose Signal 8, second toggle position, field location.
0xA8
[12:0]
0
VD
GP8_TOG2_LN
General-Purpose Signal 8, second toggle position, line location.
[25:13]
0
GP8_TOG2_PX
General-Purpose Signal 8, second toggle position, pixel location.
0xA9
[12:0]
0
VD
GP8_TOG3_FD
General-Purpose Signal 8, third toggle position, field location.
[25:13]
0
GP8_TOG3_LN
General-Purpose Signal 8, third toggle position, line location.
0xAA
[12:0]
0
VD
GP8_TOG3_PX
General-Purpose Signal 8, third toggle position, pixel location.
[25:13]
0
GP8_TOG4_FD
General-Purpose Signal 8, fourth toggle position, field location.
0xAB
[12:0]
0
VD
GP8_TOG4_LN
General-Purpose Signal 8, fourth toggle position, line location.
[25:13]
0
GP8_TOG4_PX
General-Purpose Signal 8, fourth toggle position, pixel location.
0xAC
[7:0]
0
VD
GP_LN_MODE
1 = outputs specified GP pulse on every line.
0xAD
[27]
0
VD
UNUSED
Do not access, or set to 0.
0xAE
[27]
0
VD
UNUSED
Do not access, or set to 0.
0xAF
[27]
0
VD
UNUSED
Do not access, or set to 0.
Table 60. Update Control Registers
Address
Data
Bits
Default
Value
Update
Type
Name
Description
0xB0
[15:0]
0x5803
SCK
AFE_UPDT_SCK
Each bit corresponds to one address location.
Bit 0: 1 = update Address 0x00 on SL rising edge.
Bit 1: 1 = update Address 0x01 on SL rising edge.
Bit 15: 1 = update Address 0x0F on SL rising edge.
0xB1
[15:0]
0xA7FC
SCK
AFE_UPDT_VD
Each bit corresponds to one address location.
Bit 0: 1 = update Address 0x00 on VD rising edge.
Bit 1: 1 = update Address 0x01 on VD rising edge.
Bit 15: 1 = update Address 0x0F on VD rising edge.
0xB2
[15:0]
0xD8FD
SCK
MISC_UPDT_SCK
Enable SCK update of miscellaneous registers, Address 0x10 to Address 0x1F.
0xB3
[15:0]
0x2702
SCK
MISC_UPDT_VD
Enable VD update of miscellaneous registers, Address 0x10 to Address 0x1F.
0xB4
[15:0]
0xFFF9
SCK
VDHD_UPDT_SCK
Enable SCK update of VD/HD registers, Address 0x20 to Address 0x2F.
0xB5
[15:0]
0x0006
SCK
VDHD_UPDT_VD
Enable VD update of VD/HD registers, Address 0x20 to Address 0x2F.
0xB6
[15:0]
0xFFFF
SCK
TC_UPDT_SCK
Enable SCK update of timing core registers, Address 0x30 to Address 0x3F.
0xB7
[15:0]
0000
SCK
TC_UPDT_VD
Enable VD update of timing core registers, Address 0x30 to Address 0x3F.
0xB8
[27:0]
0x04
Test
Test register. Do not access, or write to 0x04.
0xB9
[27:0]
0
UNUSED
Do not access, or write to 0x00.
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參數(shù)描述
AD9920ABBCZRL 功能描述:IC PROCESSOR CCD 12BIT 105CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR)
AD9920BBCZ 制造商:Analog Devices 功能描述:
AD9920BBCZRL 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9921BBCZ 制造商:Analog Devices 功能描述:
AD9921BBCZRL 制造商:Analog Devices 功能描述:
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