- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375249 > AD9911BCPZ-REEL7 (ANALOG DEVICES INC) 500 MSPS Direct Digital Synthesizer with 10-Bit DAC PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9911BCPZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 500 MSPS Direct Digital Synthesizer with 10-Bit DAC |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FREE, MO-220VLLD-2, LFCSP-56 |
| 文件頁(yè)數(shù)： | 31/44頁(yè) |
| 文件大?。?/td> | 666K |
| 代理商： | AD9911BCPZ-REEL7 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)當(dāng)前第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)
AD9911
Bit 7 of the instruction byte (R/Wb) determines whether a read
or write data transfer occurs after the instruction byte write. set
indicates a read operation; Cleared indicates a write operation.
Bit 4 to Bit 0 of the instruction byte determine which register is
accessed during the data transfer portion of the
communications cycle. The internal byte addresses are
generated by the AD9911.
Rev. 0 | Page 31 of 44
I/O PORT PIN DESCRIPTION
Data Clock (SCLK)
The clock pin is used to synchronize data to and from the
internal state machines of the AD9911.
Chip Select (CS)
The chip select pin allows more than one AD9911 device to be
on the same communications lines. The chip select is an active
low enable pin. Defined SDIO inputs go to a high impedance
state when CS is high. If CS is driven high during any
communications cycle, that cycle is suspended until CS is
reactivated low.
Data I/O (SDIO_0:3)
Of the four SDIO pins, only the SDIO_0 pin is dedicated to this
function. SDIO_1:3 can be used to control the ramping of the
output amplitude. Bits <2:1> in the channel select register (CSR
Register 0x00) control the configuration of these pins. See the
I/O Modes of Operation section for more information.
I/O PORT FUNCTION DESCRIPTION
Serial Data Out (SDO)
The SDO function is available in single-bit (3-wire) mode only.
In SDO mode, data is read from the SDIO_2 pin for protocols
that use separate lines for reading and writing data (see Table 23
for pin configuration options). Bits <2:1> in the CSR register
(Register 0x00) control the configuration of this pin. The SDO
function is not available in 2-bit and 4-bit I/O modes.
SYNC_I/O
The SYNC_I/O function is available in 1-bit and 2-bit modes.
SDIO_3 serves as the SYNC_I/O pin, as configured by Bits
<2:1> in the CSR register (Register 0x00). Otherwise, the
SYNC_I/O function is used to synchronize the I/O port state
machines without affecting the addressable register contents.
An active high input on the SYNC_I/O pin causes the current
communication cycle to abort. After SDIO_3 returns low (Logic
0), another communication cycle can begin. The SYNC_I/O
function is not available in 4-bit I/O mode.
MSB/LSB TRANSFER DESCRIPTION
The AD9911 I/O port supports either MSB or LSB first data
formats. This functionality is controlled by CSR <0> in the
channel select register (CSR). MSB-first is the default. When
CSR <0> is set, the I/O port is LSB-first. The instruction byte
must be written in the manner selected by CSR <0>.
Example
To write the Function Register 1 (FR1) in MSB-first format,
apply an instruction byte of MSB > 00000001 < LSB, starting
with the MSB. The internal controller recognizes a write
transfer of three bytes starting with the MSB, Bit <23>, in the
FR1 address (Register 0x01). Bytes are written on each
consecutive rising SCLK edge until Bit<0> is transferred. This
indicates the I/O communication cycle is complete and the next
byte is considered an instruction byte.
To write the Function Register 1 (FR1) in LSB-first format,
apply an instruction byte of MSB > 00000001 < LSB, starting
with the LSB. The internal controller recognizes a write transfer
of three bytes, starting with the LSB, Bit <0>, in the FR1 address
(Register 0x01). Bytes are written on each consecutive rising
SCLK edge until Bit <23> is transferred. Once the last data bit is
written, the I/O communication cycle is complete and the next
byte is considered an instruction byte.
I/O MODES OF OPERATION
There are four selectable modes of I/O port operation:
Single-bit serial 2-wire mode (default mode).
Single-bit, 3-wire mode.
2-bit mode.
4-bit mode (SYNC_I/O not available).
Table 23 displays the function of all six I/O interface pins,
depending on the mode of I/O operation selected.
Table 23. I/O Port Pin Function vs. I/O Mode
Single Bit,
2-Wire
Mode
Mode
SCLK
I/O
I/O
Clock
Clock
CSB
Chip
Select
Select
SDIO_0
Data I/O
Data In
SDIO_1
Not used
for SDIO
1
for SDIO
1
SDIO_2
Not used
for SDIO
1
Out (SDO)
SDIO_3
SYNC_I/O
SYNC_I/O
Pin
Name
Single Bit,
3-Wire
2-Bit Mode 4-Bit Mode
I/O
Clock
Chip
Select
Data I/O
Data I/O
I/O
Clock
Chip Select
Chip
Data I/O
Data I/O
Not used
Serial Data
Not used
for SDIO
1
SYNC_I/O
Serial Data
I/O
Serial Data
I/O
1
In this mode, these pins can be used for RU/RD operation
.
The two bits, CSR <2:1>, in the channel select register set the
I/O mode of operation. These bits are defined as follows:
CSR <2:1> = 00. Single bit serial mode (2-wire mode)
CSR <2:1> = 01. Single bit serial mode (3-wire mode)
CSR <2:1> = 10. 2-bit mode
CSR <2:1> = 11. 4-bit mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9948KCPZ | 10-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9948KCPZRL | 10-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9957BSVZREEL13 | 1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
| AD995PCBZ | 1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
| AD9959 | 4 Channel 500MSPS DDS with 10-bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9912 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer w/ 14-bit DAC |
| AD9912/PCBZ | 制造商:Analog Devices 功能描述:Evaluation Kit For 1 GSPS Direct Digital Synthesizer W/ 14-Bit DAC 制造商:Analog Devices 功能描述:EVAL KIT FOR 1 GSPS DIRECT DGTL SYNTHESIZER W/ 14BIT DAC - Bulk 制造商:Analog Devices 功能描述:EVALUATION BOARD AD9912 1GSPS DDS |
| AD9912A/PCBZ | 功能描述:BOARD EVALUATION FOR AD9912 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD9912ABCPZ | 功能描述:IC DDS 1GSPS DAC 14BIT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9912ABCPZ-REEL7 | 功能描述:IC DDS 1GSPS DAC 14BIT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。