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參數(shù)資料
| 型號： | AD9777BSV |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 16-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, DAC WITH PROGRAMMABLE PLL, PQFP80 |
| 封裝： | MO-026ADD-HD, TQFP-80 |
| 文件頁數(shù)： | 18/48頁 |
| 文件大?。?/td> | 6021K |
| 代理商： | AD9777BSV |
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REV. 0
–18–
AD9777
t
DS
t
SCLK
t
PWH
t
PWL
t
DS
t
DH
INSTRUCTION BIT 7
INSTRUCTION BIT 6
CS
SCLK
SDIO
Figure 4. Timing Diagram for Register Write to AD9777
t
DV
DATA BIT N
DATA BIT N–1
CS
SCLK
SDIO
SDO
Figure 5. Timing Diagram for Register Read from AD9777
NOTES ON SERIAL PORT OPERATION
The AD9777 serial port configuration bits reside in Bits 6 and 7
of Register Address 00h. It is important to note that the configura-
tion changes
immediately
upon writing to the last bit of the register.
For multibyte transfers, writing to this register may occur during
the middle of the communication cycle. Care must be taken to
compensate for this new configuration for the remaining bytes
of the current communication cycle.
The same considerations apply to setting the reset bit in Register
Address 00h. All other registers are set to their default values, but
the software reset doesn’t affect the bits in Register Address 00h.
It is recommended to use only single byte transfers when chang-
ing serial port configurations or initiating a software reset.
A write to Bits 1, 2, and 3 of Address 00h with the same logic
levels as for Bits 7, 6, and 5 (bit pattern: XY1001YX binary) allows
the user to reprogram a lost serial port configuration and to reset
the registers to their default values. A second write to Address
00h with reset bit low and serial port configuration as specified
above (XY) reprograms the OSC IN multiplier setting. A changed
f
SYSCLK
frequency is stable after a maximum of 200 f
MCLK
cycles
(equals wake-up time).
DAC OPERATION
The dual 16-bit DAC output of the AD9777, along with the
reference circuitry, gain, and offset registers, is shown in Figure 6.
Referring to the transfer functions in Equation 1, a reference
current is set by the internal 1.2 V reference, the external R
SET
resistor, and the values in the coarse gain register. The fine gain
DAC subtracts a small amount from this and the result is input
to IDAC and QDAC, where it is scaled by an amount equal to
1024/24. Figures 7a and 7b show the scaling effect of the coarse
and fine adjust DACs. IDAC and QDAC are PMOS current
source arrays, segmented in a 5-4-7 configuration. The five
most significant bits control an array of 31 current sources. The
next four bits consist of 15 current sources whose values are all
equal to 1/16 of an MSB current source. The seven LSBs are
binary weighted fractions of the middle bit’s current sources. All
current sources are switched to either I
OUTA
or I
OUTB
, depend-
ing on the input code.
The fine adjustment of the gain of each channel allows for
improved balance of QAM modulated signals, resulting in
improved modulation accuracy and image rejection. In the
Applications section of this data sheet, performance data is
included that shows to what degree image rejection can be
improved when the AD9777 is used with an AD8345 quadra-
ture modulator from ADI.
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| AD9777BSVRL | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 16-bit 80-Pin TQFP EP T/R |
| AD9777BSVZ | 功能描述:IC DAC 16BIT DUAL 160MSPS 80TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD9777BSVZ | 制造商:Analog Devices 功能描述:IC 16-BIT DAC ((NW)) 制造商:Analog Devices 功能描述:IC, DAC, 16BIT, 400MSPS, TQFP-80 |
| AD9777BSVZ | 制造商:Analog Devices 功能描述:IC DAC 16BIT 400MSPS 80TQFP |
| AD9777BSVZRL | 功能描述:IC DAC 16BIT DUAL 160MSPS 80TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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