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參數(shù)資料
| 型號： | AD9775EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter |
| 中文描述： | 14位，160 MSPS的2X/4X/8X TxDAC系列插雙D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 19/48頁 |
| 文件大小： | 6054K |
| 代理商： | AD9775EB |
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REV. 0
AD9775
–19–
The offset control defines a small current that can be added to
I
OUTA
or I
OUTB
(not both) on the IDAC and QDAC. The selec-
tion of which I
OUT
this offset current is directed toward is
programmable via Register 08h, Bit 7 (IDAC) and Register 0Ch,
Bit 7 (QDAC). Figure 8 shows the scale of the offset current
that can be added to one of the complementary outputs on the
IDAC and QDAC. Offset control can be used for suppression of
LO leakage resulting from modulation of dc signal components.
If the AD9775 is dc-coupled to an external modulator, this
feature can be used to cancel the output offset on the AD9775
as well as the input offset on the modulator. Figure 9 shows a
typical example of the effect that the offset control has on LO
suppression.
OFFSET
DAC
QDAC
IDAC
OFFSET
DAC
REFIO
0.1 F
FSADJ1
FSADJ2
RSET1
RSET2
I
OUTA1
I
OUTB1
OFFSET
CONTROL
REGISTERS
I
OUTA2
I
OUTB2
GAIN
CONTROL
REGISTERS
COARSE
GAIN
DAC
COARSE
GAIN
DAC
FINE
GAIN
DAC
FINE
GAIN
DAC
1.2VREF
GAIN
CONTROL
REGISTERS
OFFSET
CONTROL
REGISTERS
Figure 6. DAC Outputs, Reference Current Scaling, and
Gain/Offset Adjust
COARSE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k
0
5
C
0
25
10
15
20
5
10
15
20
2R MODE
1R MODE
Figure 7a. Coarse Gain Effect on I
FULLSCALE
FINE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k
0
5
F
–3.0
10
15
20
2R MODE
1R MODE
–2.5
–2.0
–1.5
–1.0
–0.5
0
Figure 7b. Fine Gain Effect on I
FULLSCALE
In Figure 9, the negative scale represents an offset added to
I
OUTB
, while the
positive scale represents an offset added to
I
OUTA
of the respective DAC. Offset Register 1 corresponds to
IDAC, while Offset Register 2 corresponds to QDAC. Figure 9
represents the AD9775 synthesizing a complex signal that is then
dc-coupled to an AD8345 quadrature modulator with an LO of
800 MHz. The dc-coupling allows the input offset of the
AD8345 to be calibrated out as well. The LO suppression at
the AD8345 output was optimized first by adjusting Offset
Register 1 in the AD9775. When an optimal point was found
(roughly Code 54), this code was held in Offset Register 1, and
Offset Register 2 was adjusted. The resulting LO suppression
is 70 dBFS. These are typical numbers and the specific code for
optimization will vary from part to part.
COARSE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k
0
200
O
0
5
400
600
800
1
2
3
4
2R MODE
1R MODE
1000
Figure 8. DAC Output Offset Current
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9775-EB | 制造商:Analog Devices 功能描述:EVAL BOARD - Bulk |
| AD9775-EBZ | 功能描述:BOARD EVALUATION FOR AD9775 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9776 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MHz to 6 GHz Broadband Quadrature Modulator |
| AD9776A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual, 12-/14-/16-Bit,1 GSPS Digital-to-Analog Converters |
| AD9776ABSVZ | 功能描述:IC DAC 12BIT 1.0GSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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