- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373962 > AD9430 (Analog Devices, Inc.) 12-Bit, 170 MSPS 3.3V A/D Converter PDF資料下載
參數(shù)資料
| 型號： | AD9430 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, 170 MSPS 3.3V A/D Converter |
| 中文描述： | 12位，170 MSPS的3.3VA / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 1594K |
| 代理商： | AD9430 |
PRELIMINARY TECHNICAL DATA
AD9430
-8- 4/01/2002 REV. PrG
PIN FUNCTION DESCRIPTIONS (CMOS mode)
CMOS Mode
Pin Number
2,7,42,43,65,66,68
1
Name
Function in CMOS Mode
DNC
S5
Do not connect
Full Scale Adjust pin : ‘1’ sets FS =
.766 V
pp differential,
‘0’ sets FS =
1.533 V
pp differential
Interlaced or parallel output mode. (only in Dual Port mode
operation) HIGH = data arrives in channel A at falling edge of clock
and data arrives in channel A at rising edge of clock. LOW = data
arrives in channels A and B at rising edge of clock.
Output Mode select. Low = Dual Port, CMOS; High = LVDS
Data format select. Low = Binary, High = Two’s compliment
3.3V analog supply. (3.0V to 3.6V)
3
S4
5
6
8,14,15,18,19,24,27,28,29,34,
39,40,88,89,90,94,95,98,99
4,9,12,13,16,17,20,23,25,26,3
0,31,35,38,41,86,87,91,92,93,
96,97,100
10
11
21
22
32
S2
S1
AV
DD
AGND
Analog Ground
SENSE
VREF
VIN+
VIN-
DS+
Control Pin for Reference , Full Scale
1.235 Reference I/O - function dependent on REFSENSE
Analog input – true.
Analog input – compliment.
Data sync (input) – true. Aligns output channels so that data from
channel A represents a sample that is prior from data in channel B,
taking into account the pipeline delay. (See timing diagram). Tie
LOW if not used.
Data sync (input) – compliment. Tie HIGH if not used.
Clock input – true.
Clock input – compliment.
B Port Output Data Bit (LSB)
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit (MSB)
B Port Overrange
Digital ground.
3.3V digital output supply. (3.0V to 3.6V)
Data Clock output – compliment.
Data Clock output – true.
A port Output Data Bit (LSB)
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit (MSB)
A port Overrange
33
36
37
44
45
46
49
50
51
52
55
56
57
58
59
60
48,53,61,67,74,82
47,54,62,75,83
63
64
69
70
71
72
73
76
77
78
79
80
81
84
85
DS-
ENC+
ENC-
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
OR_B
DrGND
DrV
DD
DCO-
DCO+
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
DA10
DA11
OR_A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9430BSV-170 | 12-Bit, 170 MSPS 3.3V A/D Converter |
| AD9432BST-80 | 12-Bit, 80 MSPS/105 MSPS A/D Converter |
| AD9432BST-105 | 12-Bit, 80 MSPS/105 MSPS A/D Converter |
| AD9432BSQ-105 | 12-Bit, 80 MSPS/105 MSPS A/D Converter |
| AD9432BSQ-80 | 12-Bit, 80 MSPS/105 MSPS A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9430/PCB-CMOS | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 170 MSPS 3.3V A/D Converter |
| AD9430_10 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 170/210 MSPS 3.3 V A/D Converter |
| AD9430BSV-170 | 制造商:Analog Devices 功能描述:ADC Single Pipelined 170Msps 12-bit Parallel 100-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
| AD9430BSV-210 | 制造商:Analog Devices 功能描述:ADC Single Pipelined 210Msps 12-bit Parallel 100-Pin TQFP EP 制造商:Analog Devices 功能描述:IC ADC 12BIT 210MSPS TQFP-100 |
| AD9430BSV-270 | 制造商:Analog Devices 功能描述:12 BIT 170 MSPS ADC - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。