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參數(shù)資料
| 型號： | AD9289 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad 8-Bit, 65 MSPS Serial LVDS 3V A/D Converter |
| 中文描述： | 四8位，65 MSPS的串行LVDS 3V的A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 1376K |
| 代理商： | AD9289 |
Prelimnary Technical Data
AD9289
AD9289—SPECIFICATIONS
Rev. PrJ | Page 3 of 16
6/25/2004
1
AVDD = 3.0V, DRVDD = 3.0V; INT REF; DIFFERENTIAL ANALOG AND CLOCK INPUTS
Parameter
Temp
Test Level
Min
Typ
Max
Unit
RESOLUTION
No Missing Codes
Offset Matching
Gain Matching
2
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error
2
Reference
Internal Reference Voltage
Output Current
Input Current
Input Resistance
Differential Input Voltage Range
Common Mode Voltage
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power
AVDD
DRVDD
Power Dissipation
3
Power Down Dissipation
Power Supply Rejection Ratio
(PSRR)
IAVDD
3
DRVDD
3
Crosstalk
8
Bits
mV
% FS
LSB
LSB
LSB
LSB
ppm/
°
C
ppm/
°
C
ppm/
°
C
V
uA
uA
k
Vpp
V
k
pF
MHz
V
V
mW
mW
mV/V
Full
25
°
C
25
°
C
25
°
C
Full
25
°
C
Full
Full
Full
Full
25
°
C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25
°
C
VI
I
I
I
VI
I
VI
V
V
V
I
V
V
V
V
V
V
V
IV
IV
VI
VI
I
Guaranteed
±
25
±
2
±
0.25
±
0.5
±
16
±
150
0.5
7
1 –2
1.5
tbd
5
400
3.0
3.0
558
<10
ACCURACY
TEMPERATURE
DRIFT
REFERENCE
ANALOG INPUTS
2.85
2.85
3.15
3.15
Full
Full
Full
VI
VI
V
150
36
70
mA
mA
dB
POWER SUPPLY
CROSSTALK
Table 1
1
Specifications subject to change without notice
2
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 0.5 V external reference and a 1 V p-p differential analog input).
3
Power dissipation measured with rated encode and a dc analog input (Outputs Static, I
VDD
= 0.). I
VCC
and I
VDD
measured with TBD MHz analog input @
0.5dBFS.
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