參數(shù)資料
型號: AD9272-65EBZ
廠商: Analog Devices Inc
文件頁數(shù): 1/44頁
文件大?。?/td> 0K
描述: BOARD EVAL AD9272
設(shè)計資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 8
位數(shù): 12
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行
輸入范圍: 733 mVpp
在以下條件下的電源(標(biāo)準(zhǔn)): 1.69W @ 65MSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD9272
已供物品: 板,電源
相關(guān)產(chǎn)品: AD9272BSVZRL-80-ND - IC ADC ASD OCTAL 80MSPS 100-TQFP
AD9272BSVZRL-65-ND - IC ADC ASD OCTAL 65MSPS 100-TQFP
AD9272BSVZRL-40-ND - IC ADC ASD OCTAL 40MSPS 100-TQFP
AD9272BSVZ-80-ND - IC ADC OCT 12BIT 80MSPS 100-TQFP
AD9272BSVZ-65-ND - IC ADC OCT 12BIT 65MSPS 100-TQFP
AD9272BSVZ-40-ND - IC ADC OCT 12BIT 40MSPS 100-TQFP
Octal LNA/VGA/AAF/ADC
and Crosspoint Switch
AD9272
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
8 channels of LNA, VGA, AAF, and ADC
Low noise preamplifier (LNA)
Input-referred noise voltage = 0.75 nV/√Hz
(gain = 21.3 dB) @ 5 MHz typical
SPI-programmable gain = 15.6 dB/17.9 dB/21.3 dB
Single-ended input; VIN maximum = 733 mV p-p/
550 mV p-p/367 mV p-p
Dual-mode active input impedance matching
Bandwidth (BW) > 100 MHz
Full-scale (FS) output = 4.4 V p-p differential
Variable gain amplifier (VGA)
Attenuator range = 42 dB to 0 dB
SPI-programmable PGA gain = 21 dB/24 dB/27 dB/30 dB
Linear-in-dB gain control
Antialiasing filter (AAF)
Programmable 2nd-order low-pass filter (LPF) from
8 MHz to 18 MHz
Programmable high-pass filter (HPF)
Analog-to-digital converter (ADC)
12 bits at 10 MSPS to 80 MSPS
SNR = 70 dB
SFDR = 75 dB
Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)
Data and frame clock outputs
Includes an 8 × 8 differential crosspoint switch to support
continuous wave (CW) Doppler
Low power, 195 mW per channel at 12 bits/40 MSPS (TGC)
120 mW per channel in CW Doppler
Flexible power-down modes
Overload recovery in <10 ns
Fast recovery from low power standby mode, <2 μs
100-lead TQFP
APPLICATIONS
Medical imaging/ultrasound
Automotive radar
GENERAL DESCRIPTION
The AD9272 is designed for low cost, low power, small size, and
ease of use. It contains eight channels of a low noise preamplifier
(LNA) with a variable gain amplifier (VGA), an antialiasing
filter (AAF), and a 12-bit, 10 MSPS to 80 MSPS analog-to-
digital converter (ADC).
Each channel features a variable gain range of 42 dB, a fully
differential signal path, an active input preamplifier termination, a
maximum gain of up to 52 dB, and an ADC with a conversion
rate of up to 80 MSPS. The channel is optimized for dynamic
performance and low power in applications where a small
package size is critical.
FUNCTIONAL BLOCK DIAGRAM
07
02
9-
0
01
SERI
A
L
PO
R
T
INT
E
RF
ACE
REFERENCE
FCO+
FCO–
DCO+
DCO–
LNA
LO-H
LOSW-H
LI-H
LG-H
12-BIT
ADC
SERIAL
LVDS
DOUTH+
DOUTH–
LNA
LO-G
LOSW-G
LI-G
LG-G
12-BIT
ADC
SERIAL
LVDS
DOUTG+
DOUTG–
LNA
LO-F
LOSW-F
LI-F
LG-F
12-BIT
ADC
SERIAL
LVDS
DOUTF+
DOUTF–
LNA
LO-E
LOSW-E
LI-E
LG-E
12-BIT
ADC
SERIAL
LVDS
DOUTE+
DOUTE–
LNA
LO-D
LOSW-D
LI-D
LG-D
12-BIT
ADC
SERIAL
LVDS
DOUTD+
DOUTD–
LNA
LO-C
LOSW-C
LI-C
LG-C
12-BIT
ADC
SERIAL
LVDS
DOUTC+
DOUTC–
LNA
LO-B
LOSW-B
LI-B
LG-B
12-BIT
ADC
SERIAL
LVDS
DOUTB+
DOUTB–
LNA
LO-A
LOSW-A
LI-A
LG-A
12-BIT
ADC
SERIAL
LVDS
DOUTA+
DOUTA–
AV
DD1
AV
DD2
ST
B
Y
DR
V
DD
PDW
N
CL
K
CL
K+
SDI
O
SC
L
K
CS
B
RBI
AS
VR
E
F
GA
IN
+
GA
IN
CW
D[
7:
0]
+
AND
CW
D[
7:
0]
SWITCH
ARRAY
DAT
A
RA
T
E
M
U
LT
IP
LIE
R
AAF
AD9272
VGA
Figure 1.
The LNA has a single-ended-to-differential gain that is selectable
through the SPI. The LNA input-referred noise voltage is typically
0.75 nV/√Hz at a gain of 21.3 dB, and the combined input-referred
noise voltage of the entire channel is 0.85 nV/√Hz at maximum
gain. Assuming a 15 MHz noise bandwidth (NBW) and a 21.3 dB
LNA gain, the input SNR is about 92 dB. In CW Doppler mode,
the LNA output drives a transconductance amp that is switched
through an 8 × 8 differential crosspoint switch. The switch is
programmable through the SPI.
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