參數資料
型號: AD9211BCPZ-250
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 10-Bit, 170/200/250 MSPS 1.8 V A/D Converter
中文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC56
封裝: 8 X 8 MM, ROHS COMPLIANT, MO-220VLLD-2, LFCSP-56
文件頁數: 8/21頁
文件大?。?/td> 310K
代理商: AD9211BCPZ-250
AD9211
Preliminary Technical Data
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Rev. PrA | Page 8 of 21
AD9211
56 Lead for
LF-CSP
TOP VIEW
(Not to Scale)
AVDD
AVDD
AVDD
RBIAS
AVDD
PDN
D
4
4
5
5
5
5
4
5
5
5
4
4
4
4
D
D
D
D
D
D
D
D
A
C
C
A
D
AVDD
AVDD
CML
AVDD
AVDD
AVDD
VIN-
VIN+
34
33
32
31
30
29
41
40
39
38
37
36
35
42
2
D
D
D
D
(
O
O
D
D
2
1
1
2
2
2
2
2
1
1
2
2
1
S
C
R
D
S
11
12
D1-
D1+
D2-
D2+
D3-
D3+
DRVDD
DRGND
D4-
D4+
13
14
4
5
6
7
8
9
2
3
10
1
D5-
D5+
D6-
D6+
Pin 0 (exposed paddle) = AGND
Figure 3. Pinout
Table 5. PIN FUNCTION DESCRIPTIONS
Pin Number
30,32,33,34,37,38,39,41,
42,43,46
7, 24,47
0
8, 23,48
35
36
40
44
45
31
28
25
26
27
29
49
50
51-54
55
56
Mnemonic Description
AVDD
1.8 V Analog Supply.
DRVDD
AGND
1
DRGND
1
VIN+
VIN–
CML
CLK+
CLK–
RBIAS
RESET
SDIO
SCLK
CSB
PWDN
DCO–
DCO+
DNC
D0–
D0+
1.8 V Digital Output Supply.
Analog Ground.
Digital Output Ground.
Analog Input—True.
Analog Input—Complement.
Analog input common mode output pin
Clock Input—True.
Clock Input—Complement.
Set Pin for Chip Bias Current. (Place 1% X kohm resistor terminated to ground).
Chip Reset ( Active high)
Serial port input/output pin
Serial port clock
Serial port chip select (Active low)
Chip power down
Data Clock Output—Complement.
Data Clock Output—True.
Do not connect
D0 Complement Output Bit.
D0 True Output Bit.
1
AGND and DRGND should be tied to a common quiet ground plane.
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