參數(shù)資料
型號： AD7869
廠商： Analog Devices, Inc.
英文描述： Complete 14-bit I/O System Containing a DAC and a ADC(完備的14位I/O系統(tǒng)（包含一個A/D轉(zhuǎn)換器和一個D/A轉(zhuǎn)換器）)
中文描述： 完整的14位I / O系統(tǒng)含的DAC和ADC的（完備的14位的I / O系統(tǒng)（包含一個的A / D轉(zhuǎn)換器和一個的D / A轉(zhuǎn)換器））
文件頁數(shù)： 3/16頁
文件大?。?/td> 308K
代理商： AD7869
(V
DD
= +5 V
6
5%, V
SS
= –5 V
6
5%, AGND = DGND = 0 V, Rl DAC = +3 V and decoupled as shown in Figure 2,
V
OUT
Load to AGND; = 2 k
V
, C
L
= 100 pF. All specifications T
MN
to T
MAX
unless otherwse noted.)
DAC SECTION
Parameter
J Versions
1
A Version
1
Units
T est Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio
3
(SNR) @ +25
°
C
T
MIN
to T
MAX
T otal Harmonic Distortion (T HD)
78
78
–86
78
77
–86
dB min
dB min
dB typ
V
OUT
= 1 kHz Sine Wave, f
SAMPLE
= 83 kHz
T ypically 82 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
V
OUT
= 1 kHz Sine Wave, f
SAMPLE
= 83 kHz
T ypically –84 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
V
OUT
= 1 kHz, f
SAMPLE
= 83 kHz
T ypically –84 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
Peak Harmonic or Spurious Noise
–86
–86
dB typ
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Bipolar Zero Error
Positive Full-Scale Error
5
Negative Full-Scale Error
5
REFERENCE OUT PUT
6
RO DAC @ +25
°
C
RO DAC T C
14
±
2
±
1
±
10
±
10
±
10
14
±
2
±
1
±
10
±
10
±
10
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
Guaranteed Monotonic
2.99/3.01
±
25
2.99/3.01
±
25
±
40
V min/V max
ppm/
°
C typ
ppm/
°
C max
Reference Load Change
(
RO DAC vs.
I)
REFERENCE INPUT
RI DAC Input Range
Input Current
–1.5
–1.5
mV max
Reference Load Current Change (0
μ
A–500
μ
A)
2.85/3.15
1
2.85/3.15
1
V min/V max
μ
A max
3 V
±
5%
LOGIC INPUT S
(
LDAC
,
TFS
, T CLK , DT )
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN7
ANALOG OUT PUT
Output Voltage Range
DC Output Impedance
Short-Circuit Current
AC CHARACT ERIST ICS
7
Voltage Output Settling-T ime
Positive Full-Scale Change
Negative Full-Scale Change
Digital-to-Analog Glitch Impulse
Digital Feedthrough
V
IN
to V
OUT
Isolation
POWER REQUIREMENT S
2.4
0.8
±
10
10
2.4
0.8
±
10
10
V min
V max
μ
A max
pF max
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
±
3
0.3
20
±
3
0.3
20
V nom
typ
mA typ
Settling T ime to Within
±
1/2 LSB of Final Value
T ypically 3
μ
s
T ypically 3.5
μ
s
DAC Code Change All 1s to All 0s
4
4
10
2
100
4
4
10
2
100
μ
s max
μ
s max
nV secs typ
nV secs typ
dB typ
V
IN
=
±
3 V, 41.5 kHz Sine Wave
As per ADC Section
NOT ES
1
T emperature ranges are as follows: J Version, 0
°
C to +70
°
C; A Version, –40
°
C to +85
°
C.
2
V
(p-p) =
±
3 V.
3
SNR calculation includes distortion and noise components.
4
Using external sample and hold, see Figures 13 to 15.
5
Measured with respect to REF IN and includes bipolar offset error.
6
For capacitive loads greater than 50 pF a series resistor is required (see Internal Reference section).
7
Sample tested @ +25
°
C to ensure compliance.
Specifications subject to change without notice
AD7869
–3–
REV. A
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