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    參數(shù)資料
    型號(hào): AD7813YNZ
    廠商: Analog Devices Inc
    文件頁數(shù): 9/11頁
    文件大?。?/td> 0K
    描述: IC ADC 10BIT PARALLEL 16-DIP
    標(biāo)準(zhǔn)包裝: 25
    位數(shù): 10
    采樣率(每秒): 400k
    數(shù)據(jù)接口: 并聯(lián)
    轉(zhuǎn)換器數(shù)目: 1
    功率耗散(最大): 17.5mW
    電壓電源: 單電源
    工作溫度: -40°C ~ 105°C
    安裝類型: 通孔
    封裝/外殼: 16-DIP(0.300",7.62mm)
    供應(yīng)商設(shè)備封裝: 16-PDIP
    包裝: 管件
    輸入數(shù)目和類型: 1 個(gè)單端,單極
    AD7813
    –7–
    REV. C
    During the acquisition phase the sampling capacitor must be
    charged to within a 1/2 LSB of its final value. The time it takes
    to charge the sampling capacitor (TCHARGE) is given by the
    following formula:
    TCHARGE = 7.6
    × (R2 + 125 ) × 3.5 pF
    For small values of source impedance, the settling time associ-
    ated with the sampling circuit (100 ns) is, in effect, the acquisi-
    tion time of the ADC. For example, with a source impedance
    (R2) of 10
    the charge time for the sampling capacitor is
    approximately 4 ns. The charge time becomes significant for
    source impedances of 2 k
    and greater.
    AC Acquisition Time
    In ac applications it is recommended to always buffer analog
    input signals. The source impedance of the drive circuitry must
    be kept as low as possible to minimize the acquisition time of
    the ADC. Large values of source impedance will cause the
    THD to degrade at high throughput rates.
    ADC TRANSFER FUNCTION
    The output coding of the AD7813 is straight binary. The
    designed code transitions occur at successive integer LSB values
    (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/1024. The
    ideal transfer characteristic for the AD7813 is shown in Figure 7.
    000...000
    0V
    ANALOG INPUT
    111...111
    000...001
    000...010
    111...110
    111...000
    011...111
    1LSB
    +VREF–1LSB
    1LSB = VREF/1024
    ADC
    CODE
    Figure 7. Transfer Characteristic
    POWER-UP TIMES
    The AD7813 has a 1.5
    s power-up time. When VDD is first
    connected, the AD7813 is in a low current mode of operation.
    In order to carry out a conversion the AD7813 must first be
    powered up. The ADC is powered up by a rising edge on an
    internally generated CONVST signal, which occurs as a result
    of a rising edge on the external CONVST pin. The rising edge
    of the external CONVST signal initiates a 1.5
    s pulse on the
    internal CONVST signal. This pulse is present to ensure the
    part has enough time to power up before a conversion is initi-
    ated, as a conversion is initiated on the falling edge of gated
    CONVST. See Timing and Control section. Care must be taken
    to ensure that the CONVST pin of the AD7813 is logic low
    when VDD is first applied.
    When operating in Mode 2, the ADC is powered down at the
    end of each conversion and powered up again before the next
    conversion is initiated. (See Figure 8.)
    t POWER-UP
    1.5 s
    t POWER-UP
    1.5 s
    t POWER-UP
    1.5 s
    MODE 1
    MODE 2
    VDD
    EXT
    CONVST
    INT
    CONVST
    VDD
    EXT
    CONVST
    INT
    CONVST
    Figure 8. Power-Up Times
    POWER VS. THROUGHPUT RATE
    By operating the AD7813 in Mode 2, the average power con-
    sumption of the AD7813 decreases at lower throughput rates.
    Figure 9 shows how the Automatic Power-Down is implemented
    using the external CONVST signal to achieve the optimum
    power performance for the AD7813. The AD7813 is operated
    in Mode 2, and the duration of the external CONVST pulse is
    set to be equal to or less than the power-up time of the device.
    As the throughput rate is reduced, the device remains in its power-
    down state longer and the average power consumption over time
    drops accordingly.
    EXT
    CONVST
    INT
    CONVST
    POWER-DOWN
    t POWER-UP
    1.5 s
    t CONVERT
    2.3 s
    t CYCLE
    100 s @ 10kSPS
    Figure 9. Automatic Power-Down
    For example, if the AD7813 is operated in a continuous sam-
    pling mode, with a throughput rate of 10 kSPS, the power con-
    sumption is calculated as follows. The power dissipation during
    normal operation is 10.5 mW, VDD = 3 V. If the power-up time
    is 1.5
    s and the conversion time is 2.3 s, the AD7813 can then
    be said to dissipate 10.5 mW for 3.8
    s (worst-case) during each
    conversion cycle. If the throughput rate is 10 kSPS, the cycle
    time is 100
    s and the average power dissipated during each
    cycle is (3.8/100)
    × (10.5 mW) = 400 W.
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