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參數(shù)資料
| 型號： | AD7813YNZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/11頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT PARALLEL 16-DIP |
| 標準包裝： | 25 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 400k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 17.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
AD7813
–3–
REV. C
ORDERING GUIDE
Linearity Package
Package
Model
Error
Description
Option
AD7813YN
±1 LSB
Plastic DIP
N-16
AD7813YR
±1 LSB
Small Outline IC
R-16A
AD7813YRU
±1 LSB
Thin Shrink Small Outline RU-16
(TSSOP)
TIMING CHARACTERISTICS
1, 2
Parameter
V
DD = 3 V
10%
V
DD = 5 V
10%
Unit
Conditions/Comments
tPOWER-UP
1.5
s (max)
Power-Up Time of AD7813 after Rising Edge of CONVST.
t1
2.3
s (max)
Conversion Time.
t2
20
ns (min)
CONVST Pulsewidth.
t3
30
ns (max)
CONVST Falling Edge to BUSY Rising Edge Delay.
t4
0
ns (min)
CS to RD Setup Time.
t5
0
ns (min)
CS Hold Time after RD High.
t6
3
10
ns (max)
Data Access Time after RD Low.
t7
3, 4
10
ns (max)
Bus Relinquish Time after RD High.
5
ns (min)
t8
10
ns (min)
Minimum Time Between MSB and LSB Reads.
t9
3
50
ns (min)
Rising Edge of CS or RD to Falling Edge of CONVST Delay.
NOTES
1Sample tested to ensure compliance.
2See Figures 12, 13 and 14.
3These numbers are measured with the load circuit of Figure 1. They are defined as the time required for the o/p to cross 0.8 V or 2.4 V for V
DD = 5 V
± 10% and
0.4 V or 2 V for VDD = 3 V
± 10%.
4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 7, quoted in the Timing Characteristics is the true bus relinquish time
of the part and as such is independent of external bus loading capacitances.
(–40 C to +105 C, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS
*
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Input Voltage to DGND
(CONVST, RD, CS) . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Digital Output Voltage to DGND
(BUSY, DB0–DB7) . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
REFIN to AGND . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Analog Input . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . . 260
°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
SSOP Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
1.6V
200 AIOL
200 A
IOH
CL
50pF
TO
OUTPUT
PIN
Figure 1. Load Circuit for Digital Output Timing
Specifications
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7813 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7813YR | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 10-bit Parallel 16-Pin SOIC N 制造商:Analog Devices 功能描述:IC 10-BIT ADC |
| AD7813YR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 10-bit Parallel 16-Pin SOIC N T/R |
| AD7813YR-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 10-bit Parallel 16-Pin SOIC N T/R |
| AD7813YRU | 功能描述:IC ADC 10BIT PARALLEL 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7813YRU-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 10-bit Parallel 16-Pin TSSOP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 400KSPS 10-BIT PARALLEL 16TSSOP - Tape and Reel |
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