參數(shù)資料
型號(hào)： AD7738
廠(chǎng)商： Analog Devices, Inc.
英文描述： 8-Channel, High Throughput,
中文描述： 8通道，高通量，
文件頁(yè)數(shù)： 25/28頁(yè)
文件大?。?/td> 407K
代理商： AD7738
REV. 0
AD7738
–25–
Figure 16. Typical ADC Frequency Response
NORMALIZED INPUT FREQUENCY
(INPUT FREQUENCY CONVERSION TIME)
0
0.1
10
1
G
–10
–20
–30
–40
–50
–60
CHOP = 1
a. Chopping Enabled
NORMALIZED INPUT FREQUENCY
(INPUT FREQUENCY CONVERSION TIME)
0
0.1
1000
1
G
–10
–20
–30
–40
–50
–60
10
100
CHOP = 0
b. Chopping Disabled
Analog Inputs Voltage Range
The absolute input voltage range with input the buffer enabled
is restricted from AGND + 200 mV to AV
DD
– 300 mV, which
also places restrictions on the common-mode range. Care must
be taken in setting up the common-mode voltage and input
voltage range so that these limits are not exceeded, otherwise
there will be degradation in linearity performance.
The analog inputs on the AD7738 can accept either unipolar or
bipolar input voltage ranges. Bipolar input ranges do not imply
that the part can handle negative voltages with respect to system
ground on its analog inputs. Unipolar and bipolar signals on the
AIN(+) input are referenced to the voltage on the respective
AIN(–) input.
For example, if AINCOM is 2.5 V and CH0 is configured to
measure AIN0 – AINCOM, 0 V to 1.25 V, the input voltage
range on the AIN0 input is 2.5 V to 3.75 V. If CH0 is config-
ured to measure AIN0 – AINCOM,
±
1.25 V, the input voltage
range on the AIN0 input is 1.25 V to 3.75 V.
Analog Inputs Extended Voltage Range
The AD7738 output data code span corresponds to the nominal
input voltage range. However, the correct operation of the ADC
is guaranteed within the min/max input voltage range.
When the CLAMP bit of the Mode register is set to 1, the
Channel Data register will be digitally clamped either to all
zeros or all ones when the analog input voltage goes outside
the nominal input voltage range.
As shown in Tables XIII and XIV, when CLAMP = 0, the data
reflect the analog input voltage outside the nominal voltage
range. In this case, the SIGN and OVR bits in the Channel
Status register should be considered along with the Data register
value to decode the actual conversion result.
Table XIII. Input Voltage Range 1.25 V, 16 Bits, CLAMP = 0
Input (V)
Data (Hex)
SIGN
OVR
+1.45000
+1.25008
+1.25004
+1.25000
+0.00004
0.00000
–0.00004
–1.25000
–1.25004
–1.25008
–1.45000
147B
0001
0000
FFFF
8001
8000
7FFF
0000
FFFF
FFFE
EB85
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
Table XIV. Input Voltage Range 0 V to 1.25 V, 16 Bits,
CLAMP = 0
Input (V)
Data (Hex)
SIGN
OVR
1.45000
1.25004
1.25002
1.25000
0.00002
0.00000
–0.00002
28F5
0001
0000
FFFF
0001
0000
0000
0
0
0
0
0
0
1
1
1
1
0
0
0
1
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