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| 型號(hào)： | AD7738 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 8-Channel, High Throughput, |
| 中文描述： | 8通道，高通量， |
| 文件頁(yè)數(shù)： | 17/28頁(yè) |
| 文件大小： | 407K |
| 代理商： | AD7738 |
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REV. 0
AD7738
–17–
Channel Setup Registers
8 Bits, Read/Write Register, Address 28h–2Fh, Default Value 00h
These registers are used to configure the selected channel, its input voltage range, and set up the corresponding Channel Status
register.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
BUF OFF
COM1
COM0
Stat. Opt.
ENABLE
RNG2
RNG1
RNG0
Default
0
0
0
0
0
0
0
0
Bit
7
Mnemonic
BUF OFF
Description
Buffer Off. If reset to 0, then internal buffer is enabled. Only operation with internal buffer enabled
is recommended.
COM1, COM0 Analog Input Configuration. See Table XI.
Stat. Opt.
Status Option. When this bit is set to 1, the P1 bit in the Status Channel register will reflect the state
of the P1 pin. When this bit is reset to 0, the P1 bit in the Status Channel register bit will reflect
the channel corresponding RDY bit in the ADC Status register.
ENABLE
Channel Enable. Set this bit to 1 to enable the channel in the Continuous Conversion mode. A single
conversion will take place regardless of this bit value.
RNG2–0
The Channel Input Voltage Range. See Table XII.
6, 5
4
3
2–0
Table XI.
COM1
0
COM0
0
COM1
1
COM0
1
Channel
0
1
2
3
4
5
6
7
AIN0–AINCOM
AIN1–AINCOM
AIN2–AINCOM
AIN3–AINCOM
AIN4–AINCOM
AIN5–AINCOM
AIN6–AINCOM
AIN7–AINCOM
AIN0–AIN1
AIN2–AIN3
AIN4–AIN5
AIN6–AIN7
AIN0–AIN1
AIN2–AIN3
AIN4–AIN5
AIN6–AIN7
Table XII.
Nominal Input
Voltage Range
±
2.5 V
0 V to +2.5 V
±
1.25 V
0 V to +1.25 V
±
0.625 V
0 V to +0.625 V
RNG2
RNG1
RNG0
1
1
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
Channel Conversion Time Registers
8 Bits, Read/Write Register, Address 30h–37h, Default Value 91h
The Conversion Time registers enable or disable chopping and configure the digital filter for a particular channel.
This register value affects the conversion time, frequency response, and noise performance of the ADC.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
CHOP
FW (7-Bit Filter Word)
Default
1
11h
Bit
Mnemonic
Description
7
6–0
CHOP
FW
Chop Enable Bit. Set to 1 to apply chopping mode for a particular channel.
CHOP = 1, Single Conversion or Continuous Conversion with one channel enabled.
Conversion Time (
μ
s) = (FW 128 + 248)/MCLK Frequency (MHz), the FW in range of 2 to 127.
CHOP = 1, Continuous Conversion with two or more channels enabled.
Conversion Time (
μ
s) = (FW 128 + 249)/MCLK Frequency (MHz), the FW in range of 2 to 127.
CHOP = 0, Single Conversion or Continuous Conversion with one channel enabled.
Conversion Time (
μ
s) = (FW 64 + 206)/MCLK Frequency (MHz), the FW in range of 3 to 127.
CHOP = 0, Single Conversion or Continuous Conversion with two or more channels enabled.
Conversion Time (
μ
s) = (FW 64 + 207)/MCLK Frequency (MHz), the FW in range of 3 to 127.
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