參數(shù)資料
型號(hào)： AD7710AN
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： Signal Conditioning ADC
中文描述： 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP24
封裝： 0.300 INCH, PLASTIC, MO-095AG, DIP-24
文件頁(yè)數(shù)： 26/28頁(yè)
文件大?。?/td> 220K
代理商： AD7710AN
REV. F
–26–
AD7710
Table VIII. 8XC51 Code for Writing to the AD7710
MOV SCON,#00000000B;
Configure 8051 for MODE 0
Operation & Enable Serial Reception
Enable Transmit Interrupt
Prioritize the Transmit Interrupt
Bring
TFS
High
Bring
TFS
High
Sets Number of Bytes to Be Written
in a Write Operation
Start Address in RAM for Bytes
Clear Accumulator
Initialize the Serial Port
MOV IE,#10010000B;
MOV IP,#00010000B;
SETB 91H;
SETB 90H;
MOV R1,#003H;
MOV R0,#030H;
MOV A,#00H;
MOV SBUF,A;
WAIT:
JMP WAIT;
INT ROUTINE:
NOP;
MOV A,R1;
JZ FIN;
DEC R1;
MOV A,@R;
INC R0;
RLC A;
Wait for Interrupt
Interrupt Subroutine
Load R1 to Accumulator
If Zero Jump to FIN
Decrement R1 Byte Counter
Move Byte into the Accumulator
Increment Address
Rearrange Data—From LSB First
to MSB First
MOV B.0,C; RLC A; MOV B.1,C; RLC A;
MOV B.2,C; RLC A; MOV B.3,C; RLC A;
MOV B.4,C; RLC A; MOV B.5,C; RLC A;
MOV B.6,C; RLC A: MOV B.7,C; MOV A,B;
CLR 93H;
CLR 91H;
MOV SBUF,A;
RETI;
FIN:
SETB 91H;
SETB 93H;
RETI;
Bring A0 Low
Bring
TFS
Low
Write to Serial Port
Return from Subroutine
Set
TFS
High
Set A0 High
Return from Interrupt Subroutine
AD7710 to 68HC11 Interface
Figure 18 shows an interface between the AD7710 and the
68HC11 microcontroller. The AD7710 is configured for its
external clocking mode while the SPI port is used on the
68HC11 which is in its single chip mode. The
DRDY
line from
the AD7710 is connected to the Port PC0 input of the 68HC11
so the
DRDY
line is polled by the 68HC11. The
DRDY
line
can be connected to the
IRQ
input of the 68HC11 if an inter-
rupt driven system is preferred. The 68HC11 MOSI and MISO
lines should be configured for wired-or operation. Depending
on the interface configuration, it may be necessary to provide
bidirectional buffers between the 68HC11’s MOSI and MISO
lines.
The 68HC11 is configured in the master mode with its CPOL
bit set to a logic zero and its CPHA bit set to a logic one. With a
10 MHz master clock on the AD7710, the interface will operate
with all four serial clock rates of the 68HC11.
AD7710
SDATA
SCLK
A0
RFS
TFS
PC0
MISO
SCK
PC1
PC2
MODE
PC3
DRDY
SYNC
68HC11
MOSI
SS
DV
DD
DV
DD
Figure 18. AD7710 to 68HC11 Interface
AD7710 to ADSP-2105 Interface
An interface circuit between the AD7710 and the ADSP-2105
microprocessor is shown in Figure 19. In this interface, the
AD7710 is configured for its self-clocking mode while the
RFS
and
TFS
pins of the ADSP-2105 are configured as inputs and
the ADSP-2105 serial clock line is also configured as an input.
When the ADSP-2105’s serial clock is configured as an input it
needs a couple of clock pulses to initialize itself correctly before
accepting data. Therefore, the first read from the AD7710 may
not read correct data. In the interface shown, a read operation
to the AD7710 accesses either the output register or the calibra-
tion registers. Data cannot be read from the control register.
A write operation always writes to the control or calibration
registers.
DRDY
is used as the frame synchronization pulse for read
operations from the output register and it is decoded with A0 to
drive the
RFS
inputs of both the AD7710 and the ADSP-2105.
The latched A0 line drives the
TFS
inputs of both the AD7710
and the ADSP-2105 as well as the AD7710 A0 input.
AD7710
SDATA
SCLK
A0
RFS
TFS
DR
SCLK
MODE
A0
DRDY
ADSP-2105
DT
DMWR
TFS
DV
DD
D
74HC74
Q
Q
RFS
Figure 19. AD7710 to ADSP-2105 Interface
相關(guān)PDF資料
PDF描述
AD7710AQ Signal Conditioning ADC
AD7710AR Signal Conditioning ADC
AD7710SQ Signal Conditioning ADC
AD7710* Signal Conditioning ADC
AD7710 Signal Conditioning ADC(LC2MOS信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7710ANZ 功能描述:IC ADC SIGNAL CONDITIONING 24DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類(lèi)型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱(chēng):497-5435-6
AD7710AQ 功能描述:IC ADC 24BIT DIFF INP 24-CDIP RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端，雙極
AD7710AR 功能描述:IC ADC 24BIT DIFF INP 24-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端，雙極
AD7710AR-REEL 功能描述:IC ADC 24BIT DIFF INP 24-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端，雙極
AD7710AR-REEL7 功能描述:IC ADC 24BIT DIFF INP 24-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類(lèi)型:1 個(gè)單端，雙極
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*