參數(shù)資料
型號： AD7440BRM-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 3/29頁
文件大?。?/td> 0K
描述： IC ADC 10BIT W/DIFF INP 8-MSOP
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 10
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 9.25mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-MSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個差分，單極
AD7440/AD7450A
Rev. C | Page 10 of 28
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals
up to half the sampling frequency (fS/2), excluding dc. The
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quanti-
zation noise. The theoretical signal-to-(noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is given by
the following:
Signal-to-(Noise + Distortion) = (6.02N + 1.76)dB.
Thus for a 12-bit converter, this is 74 dB; and for a 10-bit
converter, this is 62 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. For the AD7440/AD7450A, it is defined as
1
2
6
2
5
2
4
2
3
2
V
THD
+
=
log
20
)
dB
(
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5, and V6 are the rms amplitudes of the second to the sixth
harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic (spurious noise) is the ratio of the rms value of
the next largest component in the ADC output spectrum (up to
fS/2 and excluding dc) to the rms value of the fundamental.
Normally, the value of this specification is determined by the
largest harmonic in the spectrum, but for ADCs where the
harmonics are buried in the noise floor, it is a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies,
fa and fb, any active device with nonlinearities creates distortion
products at the sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, and so on. Intermodulation distortion terms are
those for which neither m nor n is equal to 0. For example, the
second-order terms include (fa + fb) and (fa – fb), while the third-
order terms include (2fa + fb), (2fa – fb),
(fa + 2fb), and (fa – 2fb).
The AD7440/AD7450A is tested using the CCIF standard of two
input frequencies near the top end of the input bandwidth. In this
case, the second-order terms are distanced in frequency from the
original sine waves, while the third-order terms are at a frequency
close to the input frequencies. As a result, the second- and third-
order terms are specified separately. The calculation of the
intermodulation distortion is as per the THD specification, where it
is the ratio of the rms sum of the individual distortion products to
the rms amplitude of the sum of the fundamentals, expressed in dB.
Aperture Delay
This is the amount of time from the leading edge of the
sampling clock until the ADC actually takes the sample.
Aperture Jitter
This is the sample-to-sample variation in the effective point in
time at which the actual sample is taken.
Full Power Bandwidth
The full power bandwidth of an ADC is the input frequency at
which the amplitude of the reconstructed fundamental is
reduced by 0.1 dB or 3 dB for a full-scale input.
Common-Mode Rejection Ratio (CMRR)
The common-mode rejection ratio is the ratio of the power
in the ADC output at full-scale frequency, f, to the power of a
100 mV p-p sine wave applied to the common-mode voltage of
VIN+ and VIN– of frequency fS as follows:
CMRR (dB) = 10 log (Pf/Pfs)
Pf is the power at the frequency f in the ADC output; Pfs is the
power at frequency fS in the ADC output.
Integral Nonlinearity (INL)
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function.
Differential Nonlinearity (DNL)
This is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Zero-Code Error
This is the deviation of the midscale code transition
(111...111 to 000...000) from the ideal VIN+ VIN– (i.e., 0 LSB).
Positive Gain Error
This is the deviation of the last code transition (011...110 to
011...111) from the ideal VIN+ – VIN– (i.e., +VREF 1 LSB), after
the zero code error has been adjusted out.
Negative Gain Error
This is the deviation of the first code transition (100...000 to
100...001) from the ideal VIN+ VIN– (i.e., –VREF + 1 LSB),
after the zero code error has been adjusted out.
Track-and-Hold Acquisition Time
The track-and-hold acquisition time is the minimum time
required for the track-and-hold amplifier to remain in track
mode for its output to reach and settle to within 0.5 LSB of the
applied input signal.
相關(guān)PDF資料
PDF描述
AD7920BRMZ-REEL7 IC ADC 12BIT SRL 250KSPS 8MSOP
CS5511-ASZR IC ADC 16BIT INTERNAL OSC 8-SOIC
MS27497T8F98P CONN RCPT 3POS WALL MNT W/PINS
CS5510-ASZR IC ADC 16BIT EXTERNAL OSC 8-SOIC
VI-JNL-IW-B1 CONVERTER MOD DC/DC 28V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7440BRMZ 功能描述:IC ADC 10BIT DIFF IN 1MSPS 8MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
AD7440BRMZ2 制造商:AD 制造商全稱:Analog Devices 功能描述:Differential Input, 1 MSPS ADCs in an 8-Lead SOT-23
AD7440BRT 制造商:AD 制造商全稱:Analog Devices 功能描述:Differential Input, 1 MSPS ADCs in an 8-Lead SOT-23
AD7440BRTR2 制造商:AD 功能描述:New
AD7440BRT-R2 制造商:Analog Devices 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*