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REV. A
AD73360
–14–
SPORT Register Maps
There are eight control registers for the AD73360, each eight
bits wide. Table V shows the control register map for the
AD73360. The first two control registers, CRA and CRB, are
reserved for controlling the SPORT. They hold settings for
parameters such as bit rate, internal master clock rate and de-
vice count. If multiple AD73360s are cascaded, registers CRA
and CRB on each device must be programmed with the same
setting to ensure correct operation (this is shown in the pro-
gramming examples). The other six registers; CRC through
CRH are used to hold control settings for the Reference, Power
Control, ADC channel and PGA sections of the device. It is
not necessary that the contents of CRC through CRH on
each AD73360 are similar. Control registers are written to on
the negative edge of SCLK.
Table VI. Control Word Description
15
14
13
12
11
10
9876543210
C/
D
R/
W
DEVICE ADDRESSS
REGISTER ADDRESS
REGISTER DATA
Control
Frame
Description
Bit 15
Control/
Data
When set high, it signifies a control word in Program or Mixed Program/Data Modes. When set
low, it signifies an invalid control word in Program Mode.
Bit 14
Read/
Write
When set low, it tells the device that the data field is to be written to the register selected by the
register field setting provided the address field is zero. When set high, it tells the device that the
selected register is to be written to the data field in the serial register and that the new control
word is to be output from the device via the serial output.
Bits 13–11
Device Address
This 3-bit field holds the address information. Only when this field is zero is a device selected. If
the address is not zero, it is decremented and the control word is passed out of the device via the
serial output.
Bits 10–8
Register Address
This 3-bit field is used to select one of the eight control registers on the AD73360.
Bits 7–0
Register Data
This 8-bit field holds the data that is to be written to or read from the selected register provided
the address field is zero.
Table V. Control Register Map
Address (Binary)
Name
Description
Type
Width
Reset Setting (Hex)
000
CRA
Control Register A
R/
W
8
0x00
001
CRB
Control Register B
R/
W
8
0x00
010
CRC
Control Register C
R/
W
8
0x00
011
CRD
Control Register D
R/
W
8
0x00
100
CRE
Control Register E
R/
W
8
0x00
101
CRF
Control Register F
R/
W
8
0x00
110
CRG
Control Register G
R/
W
8
0x00
111
CRH
Control Register H
R/
W
8
0x00