參數(shù)資料
型號(hào)： 935270030157
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 14/53頁(yè)
文件大小： 704K
代理商： 935270030157
Philips Semiconductors
SC16C650A
Universal Asynchronous Receiver/Transmitter (UART)
with 32-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 03 — 13 March 2003
21 of 49
9397 750 11207
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Transmit operation in mode ‘1’: When the SC16C650A is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1), the TXRDY pin will be a
logic 1 when the transmit FIFO is completely full. It will be a logic 0 when
the trigger level has been reached.
Receive operation in mode ‘1’: When the SC16C650A is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1) and the trigger level has been
reached, or a Receive Time-Out has occurred, the RXRDY pin will go to
a logic 0. Once activated, it will go to a logic 1 after there are no more
characters in the FIFO.
2
FCR[2]
XMIT FIFO reset.
Logic 0 = No FIFO transmit reset (normal default condition).
Logic 1 = Clears the contents of the transmit FIFO and resets the
FIFO counter logic (the transmit shift register is not cleared or
altered). This bit will return to a logic 0 after clearing the FIFO.
1
FCR[1]
RCVR FIFO reset.
Logic 0 = No FIFO receive reset (normal default condition).
Logic 1 = Clears the contents of the receive FIFO and resets the FIFO
counter logic (the receive shift register is not cleared or altered). This
bit will return to a logic 0 after clearing the FIFO.
0
FCR[0]
FIFO enable.
Logic 0 = Disable the transmit and receive FIFO (normal default
condition).
Logic 1 = Enable the transmit and receive FIFO. This bit must be a
‘1’ when other FCR bits are written to, or they will not be
programmed.
Table 11:
RCVR trigger levels
FCR[7]
FCR[6]
RX FIFO trigger level (bytes)
008
0116
1024
1128
Table 12:
TX FIFO trigger levels
FCR[5]
FCR[4]
TX FIFO trigger level (bytes)
0016
018
1024
1130
Table 10:
FIFO Control Register bits description…continued
Bit
Symbol
Description
相關(guān)PDF資料
PDF描述
937-SP-3044-031 4 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG
937-SP-3088R-K1-031 8 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG
940-SP-3044-031 4 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG
940-SP-3088R-031 8 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG
940-SP-361010-K1-A108 10 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935270713557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP
935270792551 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270792557 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270793551 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA
935270793557 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*