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18
LIST OF FIGURES (2/5)
Figure No.
Title
Page
5-7.
5-8.
Unacceptable Resonator Connections ......................................................................................................94
Switching between System Clock and CPU Clock.....................................................................................98
6-1.
6-2.
6-3.
6-4.
6-5.
6-6.
6-7.
6-8.
6-9.
6-10.
6-11.
6-12.
Block Diagram of 16-Bit Timer Counter 90 ..............................................................................................102
Format of 16-Bit Timer Mode Control Register 90 ...................................................................................105
Format of Buzzer Output Control Register 90..........................................................................................106
Format of Port Mode Register 3...............................................................................................................107
Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation...................................108
Timing of Timer Interrupt Operation.........................................................................................................109
Settings of 16-Bit Timer Mode Control Register 90 for Timer Output Operation......................................110
Timer Output Timing ................................................................................................................................110
Settings of 16-Bit Timer Mode Control Register 90 for Capture Operation..............................................111
Capture Operation Timing (Both Edges of CPT90 Pin are Specified) .....................................................111
16-Bit Timer Register 90 Readout Timing................................................................................................112
Settings of Buzzer Output Control Register 90 for Buzzer Output Operation ..........................................113
7-1.
7-2.
7-3.
7-4.
7-5.
7-6.
7-7.
7-8.
7-9.
7-10.
7-11.
7-12.
7-13.
7-14.
7-15.
7-16.
7-17.
7-18.
7-19.
Block Diagram of 8-Bit Timer/Event Counter 80 ......................................................................................118
Block Diagram of 8-Bit Timer/Event Counter 81 ......................................................................................118
Block Diagram of 8-Bit Timer Counter 82 ................................................................................................119
Format of 8-Bit Timer Mode Control Register 80 .....................................................................................120
Format of 8-Bit Timer Mode Control Register 81 .....................................................................................121
Format of 8-Bit Timer Mode Control Register 82 .....................................................................................122
Format of Port Mode Register 2...............................................................................................................123
Format of Port Mode Register 3...............................................................................................................123
Settings of 8-Bit Timer Mode Control Register 8n for Interval Timer Operation.......................................124
Interval Timer Operation Timing...............................................................................................................125
Settings of 8-Bit Timer Mode Control Register 8n for External Event Counter Operation........................126
External Event Counter Operation Timing (with Rising Edge Specified) .................................................126
Settings of 8-Bit Timer Mode Control Register 8n for Square Wave Output Operation...........................127
Square Wave Output Timing....................................................................................................................128
Settings of 8-Bit Timer Mode Control Register 8n for PWM Output Operation........................................129
PWM Output Timing.................................................................................................................................130
Start Timing of 8-Bit Timer Register 8n....................................................................................................131
External Event Counter Operation Timing ...............................................................................................131
Timing after Changing Values of 8-Bit Compare Register 8n during Timer Count Operation..................132
8-1.
8-2.
8-3.
Block Diagram of Watch Timer ................................................................................................................133
Format of Watch Timer Mode Control Register .......................................................................................135
Watch Timer/Interval Timer Operation Timing .........................................................................................137