![](http://datasheet.mmic.net.cn/380000/-PD784928Y_datasheet_16744934/-PD784928Y_81.png)
81
CHAPTER 1 FEATURES OF 78K/IV SERIES PRODUCTS
1.13.4 Outline of functions
Product Name
μ
PD784915,
784915A
μ
PD784915B
μ
PD784916A
μ
PD784916B
μ
PD78P4916
Item
Number of instructions
113
Minimum instruction execution time
250 ns (8-MHz internal clock operation)
Internal memory capacity
48 Kbytes
(Mask ROM)
62 Kbytes
(Mask ROM)
62 Kbytes
(One-time
PROM)
RAM
1,280 bytes
2,048 bytes
Interrupt
4 levels (programmable), vector interrupt, macro service, context
switching
External source
9 (including NMI)
Internal source
19
Number of interrupts that can use macro
service
25
Types of macro services
4 types, 10 macro services
I/O port
Input: 8, I/O: 46
Time base counter
22-bit FRC
Resolution: 125 ns, Maximum count time: 524 ms
Capture register
Input signal
Number of bits
Measurement cycle
Operating edge
CFG
DFG
HSW
V
SYNC
CTL
T
REEL
S
REEL
22
22
16
22
16
22
22
125 ns to 524 ms
125 ns to 524 ms
1
μ
s to 65.5 ms
125 ns to 524 ms
1
μ
s to 65.5 ms
125 ns to 524 ms
125 ns to 524 ms
↑
↑
↑
↑
↑
↑
↑
↓
↓
↓
↓
↓
General-purpose timer
16-bit timer
×
3
PBCTL duty identification
Duty of playback control signal
VISS detection, wide aspect detection
Linear time counter
5-bit UDC for counting CTL signal
Real-time output port
11
Serial interface
Clocked (3-wire): 2 channels
A/D converter
8-bit resolution
×
12 channels, conversion time: 10
μ
s
PWM output
16-bit resolution
×
3 channels, 8-bit resolution
×
3 channels
Carrier frequency: 62.5 kHz
Watch function
0.5-sec measurement, low-voltage operation
Standby function
HALT mode/STOP mode
Analog circuit
CTL amplifier
RECCTL driver (supports rewriting)
DPFG separation circuit (ternary separation circuit)
DFG amplifier, DPG comparator, CFG amplifier
Reel FG comparator
CSYNC comparator
Power supply voltage
V
DD
= 2.7 to 5.5 V
Package
100-pin plastic QFP (14
×
20 mm)
ROM