參數資料
型號： ZPSD512B1V
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
中文描述： 現場可編程微控制器外圍設備（可編程邏輯，零功耗，16K的位的SRAM，40余個可編程輸入/輸出，通用PLD的有61個輸入）
文件頁數： 29/142頁
文件大?。?/td> 786K
代理商： ZPSD512B1V
ZPSD5XX Famly
7-29
Bus
Interface
The Bus Interface is very flexible and can be configured to interface to most
microcontrollers with no glue logic. Table 4 lists some of the bus types to which the Bus
Interface is able to interface.
Multiplexed
Data Bus
Width
Bus Control
Signals
Microcontroller
Mux
8
WR, RD, PSEN, A0
8031
Mux/
Non-mux
8/16
R/W, E, BHE, A0
6811
Mux
8/16
WR, RD, BHE, A0
80196/80186
Mux
16
WRL, RD, WRH, A0
80196SP
Non-mux
16
R/W, LDS, UDS
68302
Non-mux
8/16
R/W, DS, SIZ0, A0
68340
Non-mux
16
R/W, DS, BHE, BLE
68330
Table 4. Typical Microcontroller Bus Types
Bus Interface Configuration
The Bus Interface Logic is user configurable. The type of bus interface is specified by
the user in the PSDsoft software (PSD configuration). The bus control input pins have
multi-function capabilities. By choosing the right configuration, the ZPSD5XX is able to
interface to most microcontrollers, including the ones listed in Table 4. In Table 5, the
names of the bus control input signal pins and their multiple functions are shown. For
example, Pin PE0 can be configured by the PSD configuration software to perform any one
of the five functions. Examples on the interface between the ZPSD5XX and some typical
microcontrollers are shown in following sections.
Pin Name
Pin
Pin
Pin
Pin
Pin
Function
1
Function
2
Function
3
Function
4
Function
5
RD
RD
E
DS
LDS
WR
WR
R/W
WRL
PE0
BHE
PSEN
WRH
UDS
SIZ0
PE1
ALE
AD0
A0
BLE
Table 5. Alternate Pin Functions
PSD5XX Interface To a Multiplexed Bus
Figure 14 shows a typical connection to a microcontroller with a multiplexed bus. The ADIO
port of the ZPSD5XX is connected directly to the microcontroller address/data bus
(AD0-AD15 for 16 bit bus). The ALE input signal latches the address lines internally. In a
read bus cycle, data is driven out through the ADIO Port transceivers after the specified
access time. The internal ADIO Port connection for a 16 bit multiplexed bus is shown in
Figure 15. The ADIO port is in tri-state mode if none of the ZPSD5XX internal devices are
selected.
相關PDF資料
PDF描述
ZPSD513B1 Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD513B1V Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD501B1 Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD501B1V Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD503B1 Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
相關代理商/技術參數
參數描述
ZPSD513B1-C-15L 制造商:WSI 功能描述:
ZPSD602E1-15L 制造商:WSI 功能描述:
ZPSD611E1-15J 制造商:WSI 功能描述:
ZPSD611E1-15JI 制造商:WSI 功能描述:
ZPSD611E1-15L 制造商:WSI 功能描述:
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