參數(shù)資料
型號(hào): ZPSD511B1
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,40余個(gè)可編程輸入/輸出,通用PLD的有61個(gè)輸入)
文件頁數(shù): 7/142頁
文件大?。?/td> 786K
代理商: ZPSD511B1
ZPSD5XX Famly
7-7
General
Description
(Cont.)
A Power Management Unit (PMU) in the ZPSD5XX enables the user to control the power
consumption on selected functional blocks based on system requirements. For
microcontrollers that do not generate a Chip Select input (CSI) to the peripheral device, the
PMU includes an Automatic Power Down unit (APD) that will turn off the ZPSD5XX
(into standby or sleep mode) based on inactivity of the ALE. The polarity of ALE inactivity
can be defined by the user. In addition to power down mode, the ZPSD5XX includes a
SLEEP mode that will reduce the power consumption.
The ZPSD5XX family is supported by the PSD Development System (PSDsoft, see
Figure 3) which runs under MS-Windows on the PC. Design entry is done using PSDabel
which creates a minimized logic implementation. PSDabel also provides logic simulation of
the ZPLD. The ZPSD5XX desired configuration is entered using a simple Window based
menu. The PSD Compiler, which consists of a Fitter and Address Translator, generates an
object file from the PSDabel and MCU code files. The object file can be down loaded to a
programmer (MagicPro
, Data I/O or other third party) or to PSDsilos III providing full chip
simulation.
The ZPSD5XX standard versions include up to 1 Mb of EPROM, 16 Kbit SRAM, Decode
PLD (DPLD), General Purpose PLD (GPLD), Peripheral PLD (PPLD), four 16-bit
Counter/Timers, an 8-level maskable Interrupt Controller and five 8-bit I/O Ports. They are
ideal for general purpose embedded systems applications.
The ZPSD5XXV low-voltage, low-power versions operate down to 2.7 volts and feature
Sleep Mode current of only 1 microamp (typical).
The PSD5XXM mask-programmable versions deliver the lowest cost PSD5XX
solution. See the Masked-PSD Ordering Information chapter in this databook for the
mask-programmable PSD5XXM ordering procedure.
References in this document to ZPSD5XX versions are generic and also specifically include
any “non-V” products (ZPSD5XX and ZPSD5XXM).
References to ZPSD5XXV versions include ZPSD5XXV and ZPSD5XXVM products.
References to ZPSD5XXM versions include ZPSD5XXM and ZPSD5XXVM products.
相關(guān)PDF資料
PDF描述
ZPSD511B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
ZPSD602(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD601(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD603(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD611(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
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