參數(shù)資料
型號: ZPSD413A1
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,零功耗,16K的位的SRAM,40余個可編程輸入/輸出,通用PLD的有37個輸入)
文件頁數(shù): 54/108頁
文件大?。?/td> 626K
代理商: ZPSD413A1
ZPSD4XX Famly
5-54
Port A D Functionality and Structure
Port A is the most flexible of all the I/O ports. It can be configured to perform one or more
of the following functions:
J
Standard MCU I/O Mode
J
PLD I/O
J
Address Out – latched address lines A[0-7] are assigned to pins PA[0-7].
J
Address In – input port for other address lines, inputs can be latched by ALE.
J
Peripheral I/O
Figure 27 shows the structure of a Port A pin. If the pin is configured as an output port,
the multiplexer selects one of its three inputs as output. If the pin is configured as an input,
the input connects to :
1. Data In Register as input in Standard MCU I/O Mode
or
2. PA Macrocell as PLD input
or
3. PA Macrocell through a latch latched by ALE, as Address In input.
Port B D Functionality and Structure
Port B is similar to Port A in structure. It can be configured to perform one or more of the
following functions:
J
Standard MCU I/O Mode
J
PLD I/O
J
Address Out – address lines A[0-7] for 8-bit multiplexed bus or address lines
A[8-15] for 16-bit multiplexed bus are assigned to pins PB[0-7].
Figure 28 shows the structure of a Port B pin. If the pin is configured as an output port,
the multiplexer selects one of its three inputs as output. If the pin is configured as input,
the input connects to :
J
Data In Register as input in Standard MCU I/O Mode
or
J
PB Macrocell as PLD input
I/OPorts
(Cont.)
相關PDF資料
PDF描述
ZPSD401A1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
ZPSD401A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
ZPSD403A1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
ZPSD403A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
ZPSD412A1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
相關代理商/技術參數(shù)
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