參數(shù)資料
型號: ZPSD303
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有16個輸入)
文件頁數(shù): 32/90頁
文件大小: 491K
代理商: ZPSD303
ZPSD3XX Famly
3-32
The configuration bits for Figure 15 are:
CALE
CDATA
CADDRDAT
CRESET
0
0
1
0
Figure 15.
ZPSD3XX
Interface With
Motorola’s
68HC11
MICROCONTROLLER
20
21
22
23
24
25
43
45
47
49
44
46
48
50
34
33
32
31
30
29
28
27
52
51
23
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
22
2
13
3
1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
E
R/W
AS
RESET
XIRQ
IRQ
MODB
MODA
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
A19/CSI
9
10
11
12
13
14
15
16
42
41
40
39
38
37
36
35
5
6
4
17
18
19
2
3
21
20
19
18
17
16
15
14
11
10
9
8
7
6
5
4
40
41
42
43
PD0
PD1
PD2
PD3
PD4
PD5
PE0
PE1
PE2
PE3
PD4
PE5
PE6
PE7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
VRH
VRL
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
AD8/A8
AD9/A9
AD10/A10
AD11/A11
AD12/A12
AD13/A13
AD14/A14
AD15/A15
E
R/W/V
PP
AS
RESET
BHE/PSEN
GND
ZPSD3XX
34
12
V
CC
V
CC
68HC11
XTAL EXTAL
44
0.1μF
System
Applications
(Cont.)
In Figure 16, the ZPSD3XX is configured to work directly with Intel’s 80C196KB
microcontroller, which is a 16-bit address/16-bit data bus processor. Address and data
lines multiplexed. In the example shown, all configuration bits are set. The ZPSD3XX is
configured to use PC0, PC1, PC2, and A19/CSI as A16, A17, A18, and A19 inputs,
respectively. These signals are independent of the ALE pulse (latch-transparent).
They are used as four general-purpose logic inputs that take part in the PAD equations
implementation.
Port A is configured to work in the special track mode, in which (for certain conditions)
PA0–PA7 tracks lines AD0/A0–AD7/A7. Port B is configured to generate CS0–CS7. In this
example, PB2 serves as a WAIT signal that slows down the 80C196KB during the access of
external peripherals. These 8-bit wide peripherals are connected to the shared bus of Port
A. The WAIT signal also drives the buswidth input of the microcontroller, so that every
external peripheral cycle becomes an 8-bit data bus cycle. PB3 and PB4 are open-drain
output signals; thus, they are pulled up externally.
COMB/SEP
CRRWR
CEDS
0
1
0
All other configuration bits may vary according to the application requirements.
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