參數(shù)資料
型號: Z9104CAB
英文描述: SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:800V; On-State RMS Current, IT(rms):8A; Peak Non Repetitive Surge Current, Itsm:100A; Gate Trigger Current Max, Igt:15uA
中文描述: 六分布式輸出時鐘驅(qū)動器| TQFP封裝| 32腳|塑料
文件頁數(shù): 3/8頁
文件大小: 69K
代理商: Z9104CAB
Variable Delay Motherboard Clock Buffer
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07083 Rev. *A
5/07/2001
Page 3 of 8
Z9104
APPROVED PRODUCT
Maximum Ratings
Voltage Relative to VSS:
Voltage Relative to VDD:
Storage Temperature:
Operating Temperature:
Maximum Power Supply:
-0.3V
0.3V
0
o
C to + 125
o
C
0
o
C to +70
o
C
7V
This device contains circuitry to protect the inputs
against damage due to up to 2,000 volt static voltages
or electric field; however, precautions should be taken
to avoid application of any voltage higher than the
maximum rated voltages to this circuit. For proper
operation, Vin and Vout should be constrained to the
range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
Electrical Characteristics
Characteristic
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Voltage High for
CLK(2:6)
Output Voltage for High
CLK25
Output Voltage Low for
CLK25
Tri-State leakage Current
Dynamic Supply Current
Maximum Core Supply
Current
Maximum PLL Supply
Current
Symbol
VIL
VIH
IIL
IIH
VOH
Min
Typ
Max
Units
Vdc
Vdc
μA
μA
Vdc
Conditions
-
-
-
0.8
3.6
-66
±
100
2.0
-
2.4
@IOH = -20ma
VOH
C25
2.0
0.5
Vdc
@IOH = -20ma
VIL
1.0
Vdc
@IOL = 20ma
Ioz
Idd
I
CC
-
-
-
-
10
150
130
μA
mA
mA
CLK(1:6) = 100 MHz all at rated load
I
CCPLL
20
mA
VDD = VDDF =3.3V
±
5
%, TA = 0oC to +70oC
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