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參數(shù)資料
| 型號： | Z9953AA |
| 英文描述： | SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:800V; On-State RMS Current, IT(rms):20A; Peak Non Repetitive Surge Current, Itsm:300A; Gate Trigger Current Max, Igt:30uA |
| 中文描述： | 八分布式輸出時鐘驅(qū)動器| TQFP封裝| 32腳|塑料 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 43K |
| 代理商： | Z9953AA |
3.3V, 180MHz, Multi-Output Zero Delay Buffer
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07086 Rev. *A
06/18/2001
Page 1 of 6
Z9953
Product Features
110MHz Clock Support
Supports PowerPC
TM
, Intel and RISC Processors
9 Clock Outputs: drive up to 18 loads
LVPECL Reference Input Clock
Output Disable Control
Spread Spectrum Compatible
3.3V Power Supply
Pin Compatible with MPC953
Industrial Temp. Range: -40°C to +85°C
32-Pin TQFP Package
Block Diagram
Figure 1
Frequency Table
BYPASS# PLL_EN VCO_SEL Q(0:7)
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
FB_OUT
REF
REF
REF
REF
REF/4
REF/8
VCO/4
VCO/8
0
1
0
1
0
1
0
1
REF
REF
REF
REF
REF/4
REF/8
VCO/4
VCO/8
Table 1
Function Table
BYPASS#
‘
1
’ = PLL Enabled
‘
0
’ = PLL Bypass
‘
1
’ = Outputs Disabled HiZ
‘
0
’ = Outputs Enabled
‘
1
’ = VCO/2
‘
0
’ = VCO
‘
1
’ = Select VCO
‘
0
’ = Select PECL_CLK
Table 2
MR/OE#
VCO_SEL
PLL_EN
Pin Configuration
Phase
Detector
LPF
VCO
200-500M
/4
/2
PECL_CLK
PECL_CLK#
FB_IN
VCO_SEL
BYPASS#
MR/OE#
PLL_EN
FB_OUT
Q(0:6)
Q7
7
Z9953
V
B
P
V
F
V
Q
V
P
M
V
Q
V
Q
V
Q
Q1
VDDC
Q2
VSS
Q3
VDDC
Q4
VSS
VDD
FB_IN
NC
NC
NC
NC
VSS
PECL_CLK
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
1
1
1
1
1
1
1
3
3
3
2
2
2
2
2
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