參數(shù)資料
型號(hào)： Z86L9808SSC
英文描述： Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A
中文描述： 單片機(jī)| 8位| Z8的CPU |的CMOS |專科| 28腳|塑料
文件頁(yè)數(shù)： 68/87頁(yè)
文件大?。?/td> 1182K
代理商： Z86L9808SSC
Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
PS006403-0502
62
Figure 34. Resets and WDT
WDTMR During STOP (D3)
This bit determines whether or not the WDT is active during STOP Mode.
Because the XTAL clock is stopped during STOP Mode, the on-board RC has to
be selected as the clock source to the WDT/POR counter. A 1 indicates active
during STOP. The default is 1.
Clock Source for WDT (D4)
This bit determines which oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a 1, the internal RC oscillator is bypassed and the
POR and WDT clock source is driven from the external pin, XTAL1. The default
configuration of this bit is 0, which selects the RC oscillator.
-
* CLR1 and CLR2 enable the WDT/POR and 18 Clock Reset timers upon a Low-to-High input translation.
+
From Stop
Mode
Recovery
Source
Stop Delay
Select (SMR)
5 Clock Filter
*CLR2 18 Clock RESET
CLK Generator
RESET
WDT TAP SELECT
POR 5 ms 10 ms 20 ms 80 ms
CLK
*CLR1
WDT/POR Counter Chain
M
U
X
INTERNAL
RC
OSC.
CK Source
Select
(WDTMR)
XTAL
WDT
V
CC
Low Operating
Voltage Det.
VBO/VLV
2V REF.
V
DD
Internal
RESET
Active
High
12-ns Glitch Filter
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