參數(shù)資料
型號: Z86L9808SSC
英文描述: Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A
中文描述: 單片機| 8位| Z8的CPU |的CMOS |專科| 28腳|塑料
文件頁數(shù): 56/87頁
文件大?。?/td> 1182K
代理商: Z86L9808SSC
Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
PS006403-0502
50
When more than one interrupt is pending, priorities are resolved by a programma-
ble priority encoder controlled by the Interrupt Priority Register. An interrupt
machine cycle is activated when an interrupt request is granted. As a result, all
subsequent interrupts are disabled, and the Program Counter and Status Flags
are saved. The cycle then branches to the program memory vector location
reserved for that interrupt. All Z86L81/86/98 interrupts are vectored through loca-
tions in the program memory. This memory location, and the next byte, contain the
16-bit address of the interrupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked, and the
Interrupt Request register is polled to determine which of the interrupt requests
require service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 may be rising, falling, or both edge
triggered; all are programmable by the user. The software can poll to identify the
state of the pin.
Programming bits for the Interrupt Edge Select are located in the IRQ Register
(R250), bits D7 and D6. The configuration is indicated in Table 15.
Table 14.Interrupt Types, Sources, and Vectors
Name
Source
Vector Location
Comments
IRQ0
P32
0,1
External (P32), Rising Falling Edge
Triggered
IRQ1
P33
2,3
External (P33), Falling Edge Triggered
IRQ2
P31, T
IN
4,5
External (P31), Rising Falling Edge
Triggered
IRQ3
T16
6,7
Internal
IRQ4
T8
8,9
Internal
IRQ5
LVD
10,11
Internal
Table 15.IRQ Register*
IRQ
Interrupt Edge
D7
D6
IRQ2(P31)
IRQ0 (P32)
0
0
F
F
0
1
F
R
1
0
R
F
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