參數(shù)資料
型號: Z86L9808SSC
英文描述: Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A
中文描述: 單片機| 8位| Z8的CPU |的CMOS |??苵 28腳|塑料
文件頁數(shù): 59/87頁
文件大?。?/td> 1182K
代理商: Z86L9808SSC
Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
PS006403-0502
53
HALT
HALT turns off the internal CPU clock, but not the XTAL oscillation. The counter/
timers and external interrupts IRQ0, IRQ1, IRQ2, IRQ3, and IRQ4 remain active.
The devices are recovered by interrupts, either externally or internally generated.
An interrupt request must be executed (enabled) to exit HALT Mode. After the
interrupt service routine, the program continues from the instruction after the
HALT.
STOP
This instruction turns off the internal clock and external crystal oscillation, thereby
reducing the standby current to 10
μ
A or less. STOP Mode is terminated only by a
reset (such as WDT timeout), POR, SMR, or external reset. This termination
causes the processor to restart the application program at address
000Ch
. In
order to enter STOP (or HALT) mode, first flush the instruction pipeline to avoid
suspending execution in mid-instruction. Execute a NOP (Op Code =
FFh
) imme-
diately before the appropriate sleep instruction, as follows:
FF
NOP
; clear the pipeline
6F
STOP
; enter STOP Mode
or
FF
7F
NOP
HALT
; clear the pipeline
; enter HALT Mode
Port Configuration Register (PCON)
The PCON register (Figure 28) configures the comparator output on Port 3. It is
located in the expanded register 2 at Bank F, location 00.
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