TABLE
參數資料
型號: XRT86VL34IB-F
廠商: Exar Corporation
文件頁數: 54/155頁
文件大小: 0K
描述: IC LIU/FRAMER T1/E1/J1 4CH 225BG
標準包裝: 84
控制器類型: T1/E1/J1 調幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應商設備封裝: 225-BGA(19x19)
包裝: 托盤
XRT86VL34
142
REV. V1.2.1
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 120: LIU CHANNEL CONTROL ARBITRARY REGISTER 6 (LIUCCAR6)
HEX ADDRESS: 0X0FND
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6-0
Arb_seg6
R/W
0
Arbitrary Transmit Pulse Shape, Segment 6
These seven bits form the sixth of the eight segments of the transmit
shape pulse when the XRT86VL34 is configured in “Arbitrary Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0x0Fn0.
TABLE 121: LIU CHANNEL CONTROL ARBITRARY REGISTER 7 (LIUCCAR7)
HEX ADDRESS: 0X0FNE
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6
Arb_seg7
R/W
0
Arbitrary Transmit Pulse Shape, Segment 7
These seven bits form the seventh of the eight segments of the
transmit shape pulse when the XRT86VL34 is configured in “Arbi-
trary Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0x0Fn0.
TABLE 122: LIU CHANNEL CONTROL ARBITRARY REGISTER 8 (LIUCCAR8)
HEX ADDRESS: 0X0FNF
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6
Arb_seg8
R/W
0
Arbitrary Transmit Pulse Shape, Segment 8
These seven bits form the eight of the eight segments of the trans-
mit shape pulse when the XRT86VL34 is configured in “Arbitrary
Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0x0Fn0.
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