TABLE
參數(shù)資料
型號: XRT86VL34IB-F
廠商: Exar Corporation
文件頁數(shù): 47/155頁
文件大?。?/td> 0K
描述: IC LIU/FRAMER T1/E1/J1 4CH 225BG
標準包裝: 84
控制器類型: T1/E1/J1 調幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應商設備封裝: 225-BGA(19x19)
包裝: 托盤
XRT86VL34
135
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.1
TABLE 112: LIU CHANNEL CONTROL STATUS REGISTER (LIUCCSR)
HEX ADDRESS: 0X0FN5
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
RO
0
6
DMO_n
RO
0
Driver Monitor Output (DMO) Status:
This READ-ONLY bit indicates whether or not the Transmit Section
is currently declaring the DMO Alarm condition.
The Transmit Section will check the Transmit Output T1 Line signal
for bipolar pulses via the TTIP and TRING output signals. If the
Transmit Section were to detect no bipolar signal for 128 consecu-
tive bit-periods, then it will declare the Transmit DMO Alarm condi-
tion. This particular alarm can be used to check for fault conditions
on the Transmit Output Line Signal path.
The Transmit Section will clear the Transmit DMO Alarm condition
the instant that it detects some bipolar activity on the Transmit Out-
put Line signal.
0 = Indicates that the Transmit Section of XRT86VL34 is NOT cur-
rently declaring the Transmit DMO Alarm condition.
1 = Indicates that the Transmit Section of XRT86VL34 is currently
declaring the Transmit DMO Alarm condition.
NOTE: If the DMO interrupt is enabled (DMOIE - bit D6 of register
0x0Fn4), any transition on this bit will generate an Interrupt.
5
FLS_n
RO
0
FIFO Limit Status:
This READ-ONLY bit indicates whether or not the XRT86VL34 is
currently declaring the FIFO Limit Status.
This bit is set to a “1” to indicate that the jitter attenuator Read/Write
FIFO pointers are within +/- 3 bits.
0 = Indicates that the XRT86VL34 is NOT currently declaring the
FIFO Limit Status.
1 = Indicates that the XRT86VL34 is currently declaring the FIFO
Limit Status.
NOTE: If the FIFO Limit Status Interrupt is enabled, (FLSIE bit - bit
D5 of register 0x0Fn4), any transition on this bit will
generate an Interrupt.
4
LCVS_n
RO
0
Line Code Violation Status:
This READ-ONLY bit indicates whether or not the XRT86VL34 is
currently declaring a Line Code Violation or an excessive number of
zeros.
This bit is set to a “1” to indicate an LCV or excessive zero condition.
0 = Indicates that the XRT86VL34 is NOT currently declaring the
LCV or Excessive Zero condition.
1 = Indicates that the XRT86VL34 is currently declaring the LCV or
Excessive Zero condition.
If the Line Code Violation Status Interrupt is enabled, (LCVIE bit - bit
D4 of register 0x0Fn4), any transition on this bit will generate an
Interrupt.
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