Rev. 1.01 Figure 16. Illustration of the XRT8001 WAN Clock Operating in the “E1 to T1 – Forward/Master” Mode 6.5 Configuring the XRT" />
參數(shù)資料
型號: XRT8001IP-F
廠商: Exar Corporation
文件頁數(shù): 20/48頁
文件大小: 0K
描述: IC WAN CLOCK E1/E1 DUAL 18PDIP
產(chǎn)品變化通告: XRT obsolescence 05/Mar/2012
標準包裝: 41
類型: 時鐘/頻率發(fā)生器
PLL:
主要目的: 以太網(wǎng)(WAN),T1/E1
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 16.384kHz
電源電壓: 3.3 V ~ 5 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 18-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 18-PDIP
包裝: 管件
XRT8001
27
Rev. 1.01
Figure 16. Illustration of the XRT8001 WAN Clock
Operating in the “E1 to T1 – Forward/Master” Mode
6.5 Configuring the XRT8001 WAN Clock into the
“E1 to T1 – Forward/Master” Mode
The user can configure the XRT8001 WAN Clock to
operate in the “E1 to T1 – Forward/Master” Mode by
executing the following steps:
Step 1 – Configure the XRT8001 to operate in the
“MASTER” Mode, by pulling the “MSB” input pin (pin 8)
to VDD.
Step 2 – Write the binary value “1000” into Command
Register CR0, as illustrated below:
Command Register CR0 (Address = 0x00)
D4
D3
D2
D1
D0
IOC4
IOC3
IOC2
IOC1
PL1EN
1
0
X
Command Register, CR1 (Address = 0x01)
D4
D3
D2
D1
D0
M4
M3
M2
M1
PL2EN
Value of “Q - 1” (in Binary Format)
X
XRT8001
XRT8001
WAN Clock
FIN
CLK1
CLK2
Q x 2.048MHz
Where: 1 < Q < 16
1.544MHz
This step configures the XRT8001 WAN Clock to
operate in the “E1 to T1 – Forward/Master” Mode.
Note: If the user wishes to output a clock signal via the
CLK1 output signal, then he/she should also write a “1”
into the “PL1EN” bit-field within Command Register,
CR0.
Step 3 – Next, you need to specify the value for “Q”
*(e.g., as in the “Q x 2.048MHz” clock signal which
will be applied to the “FIN” input pin).
The user accomplishes this writing the binary
expression for “Q - 1” into Command Register, CR1,
as illustrated below.
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