- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄9995 > XRT73LC04AIV (Exar Corporation)IC LIU E3/DS3/STS-1 4CH 144LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | XRT73LC04AIV |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 21/64頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 4CH 144LQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類(lèi)型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 4/4 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP（20x20） |
| 包裝： | 托盤(pán) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)當(dāng)前第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)
XRT73LC04A
24
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
SYSTEM DESCRIPTION
A functional block diagram of the XRT73LC04A E3/
DS3/STS-1 Transceiver IC is presented in Figure 13.
The XRT73LC04A contains four separate channels
with three distinct sections:
The Transmit Section - Channels 0, 1, 2, and 3
The Receive Section - Channels 0, 1, 2, and 3
The Microprocessor Serial Interface Section
THE TRANSMIT SECTION - CHANNELS 0, 1, 2,
AND 3
The Transmit Section, within each Channel, accepts
TTL/CMOS level signals from the Terminal Equip-
ment in either a Single-Rail or Dual-Rail format. The
Transmit Section then takes this data and does the
following:
Encode this data into the B3ZS format if the DS3 or
SONET STS-1 Modes has been selected or into
the HDB3 format if the E3 Mode has been selected.
Convert the CMOS level B3ZS or HDB3 encoded
data into pulses with shapes that are compliant with
the various industry standard pulse template
requirements.
Drive these pulses onto the line via the TTIP_(n)
and TRing_(n) output pins across a 1:1 Trans-
former.
NOTE: The Transmit Section drives a "1" (or a Mark) onto
the line by driving either a positive or negative polarity pulse
across the 1:1 Transformer within a given bit period. The
Transmit Section drives a "0" (or a Space) onto the line by
driving no pulse onto the line.
THE RECEIVE SECTION - CHANNELS 0, 1, 2 AND
3
The Receive Section, within each Channel, receives
a bipolar signal from the line via the RTIP and RRing
signals through a 1:1 Transformer or 0.01F Capaci-
tor.
The recovered clock and data outputs to the Local
Terminal Equipment in the form of CMOS level sig-
nals via the RPOS_(n), RNEG_(n) and RxClk_(n)
output pins.
THE MICROPROCESSOR SERIAL INTERFACE
The XRT73LC04A can be configured to operate in ei-
ther the Hardware Mode or the HOST Mode.
The XRT73LC04A contains four identical channels.
The Microprocessor Interface Inputs are common to
all channels. The descriptions that follow refer to
Channel(n) where (n) represents channel 0, 1, 2 or 3.
a. Operating in the Hardware Mode
When the XRT73LC04A is operating in the Hardware
Mode, then the following is true:
1. The Microprocessor Serial Interface block is dis-
abled.
2. The XRT73LC04A is configured via input pin set-
tings.
The XRT73LC04A can be configured to operate in
the Hardware Mode by tying the HOST/(HW) input
pin to GND.
Each of the pins associated with the Microprocessor
Serial Interface takes on their alternative role as de-
fined inTable 1.
When the XRT73LC04A is operating in the Hardware
Mode, all of the remaining input pins become active.
b. Operating in the HOST Mode
The XRT73LC04A can be configured to operate in
the HOST Mode by tying the HOST/(HW) input pin to
VDD.
When the XRT73LC04A is operating in the HOST
Mode, then the following is true.
1. The Microprocessor Serial Interface block is
enabled. Writing the appropriate data into the
on-chip Command Registers makes many config-
uration selections.
2. All of the following input pins are disabled and
should be connected to ground:
Pins 43, 44, 137 & 138 - TxLEV_(n)
Pins 45, 46, 135 & 136 TAOS_(n)
Pin 82, 90, 91 & 99 - REQEN_(n)
Pin 77, 85, 96 & 104 - RLB_(n)
Pin 76, 84, 97 & 105 - LLB_(n)
Pin 107 & 108 - E3_(n)
Pin 73, 83, 98 &106 - STS-1/DS3_(n)
TABLE 1: ROLE OF MICROPROCESSOR SERIAL
INTERFACE PINS WHEN THE XRT73LC04A IS
OPERATING IN THE
HARDWARE MODE
PIN #
PIN NAME
FUNCTION, WHILE IN
HARDWARE MODE
69
CS/(SR/DR)
(SR/DR)
70
SClk/(RxOFF)
RxOFF
71
SDI/(E3_1)
E3_1
72
SDO/(E3_0)
E3_0
110
REGR/(RxClkINV)
RxClkINV
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72V3660L15PFI8 | IC FIFO SS 4096X36 15NS 128-TQFP |
| MS27499E8B6SA | CONN RCPT 6POS BOX MNT W/SCKT |
| XRT75L02IV-F | IC LIU E3/DS3/STS-1 2CH 100TQFP |
| MS3101F22-12S | CONN RCPT 5POS FREE HNG W/SCKT |
| M83723/75A14126 | CONN PLUG 12POS STRAIGHT W/SCKT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC04AIV-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73R06 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73R06ES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73R06IB | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73R06IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。