Rev.1.01 PGA00 Register D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 PGA00 PGA00[9] PGA00[8] PGA00[7] PGA00[6] PGA00[5] PGA00[4] PGA00[3] PGA00[2]" />
參數(shù)資料
型號(hào)： XRD98L63AIV-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 2/41頁(yè)
文件大?。?/td> 0K
描述： IC CCD DIGITIZER 12BIT 48TQFP
標(biāo)準(zhǔn)包裝： 250
位數(shù)： 12
通道數(shù)： 1
電壓 - 電源，模擬： 2.7 V ~ 3.6 V
電壓 - 電源，數(shù)字： 2.7 V ~ 3.6 V
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤
XRD98L63
10
Rev.1.01
PGA00 Register
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PGA00
PGA00[9] PGA00[8] PGA00[7] PGA00[6] PGA00[5] PGA00[4] PGA00[3] PGA00[2] PGA00[1] PGA00[0]
default
0
PGA00[9:0] is used to set the gain of the Programmable Gain Amplifier (PGA).
Code = 0000000000 is minimum gain (6dB). Code
≥ 1001111111 is maximum gain (36dB).
See the “Programmable Gain Amplifier” (pg. 16) and the “Multiple Gain Mode” (pg. 30) sections for more
information.
Offset Register
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Offset
OB[7]
OB[6]
OB[5]
OB[4]
OB[3]
OB[2]
OB[1]
OB[0]
default
0
1
0
OB[7:0] is used by the Offset Calibration logic as the target output code for Optical Black pixels.
See the “Black Level Offset Calibration” section (pg. 19) for more information.
PGA01, PGA10 and PGA11 Registers
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PGA01
PGA01[8] PGA01[7] PGA01[6] PGA01[5] PGA01[4] PGA01[3] PGA01[2] PGA01[1] PGA01[0]
default
0
PGA10
PGA10[8] PGA10[7] PGA10[6] PGA10[5] PGA10[4] PGA10[3] PGA10[2] PGA10[1] PGA10[0]
default
0
PGA11
PGA11[8] PGA11[7] PGA11[6] PGA11[5] PGA11[4] PGA11[3] PGA11[2] PGA11[1] PGA11[0]
default
0
PGA01[8:0], PGA10[8:0] and PGA11[8:0] are used in the Multiple Gain mode to program the gain ratios for
different pixel colors. See the “Multiple Gain Mode” section (pg. 30) for more information.
OB Even Gain & OB Odd Gain Registers
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
OB Even Gain
OBE[8]
OBE[7]
OBE[6]
OBE[5]
OBE[4]
OBE[3]
OBE[2]
OBE[1]
OBE[0]
default
0
OBE[8:0] is used in the Multiple Gain mode to program the gain to be applied to Optical Black pixels on Even
lines during Offset Calibration. OBO[8:0] is used in the Multiple Gain mode to program the gain to be applied
to Optical Black pixels on Odd lines during Offset Calibration. See the “Multiple Gain Mode” section (pg. 30)
for more information.
Even Line and Odd Line Registers
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Even Line
PRE[1]
PRE[0]
ELP4[1]
ELP4[0]
ELP3[1]
ELP3[0]
ELP2[1]
ELP2[0]
ELP1[1]
ELP1[0]
default
0
1
0
1
0
Odd Line
PRO[1]
PRO[0]
OLP4[1]
OLP4[0]
OLP3[1]
OLP3[0]
OLP2[1]
OLP2[0]
OLP1[1]
OLP1[0]
default
0
1
0
1
The Even Line and Odd Line Registers are used to program the pixel patterns for Even and Odd lines in the
Multiple Gain mode. See the “Multiple Gain Mode” section (pg. 30) for more information.
Calibration Register
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Calibration
OBdel[1]
OBdel[0]
Avg[1]
Avg[0]
DNS[1]
DNS[0]
Mode
Hold
ManCal
default
0
1
0
1
0
The Calibration register is used to program various options for the Offset Calibration logic.
OBdel[1:0], sets the number of Fringe pixels which should not be used for Black Level Calibration.
Avg[1:0], sets the number of OB pixels to average, 00=32 pix, 01=64 pix, 10=128 pix, 11=256 pix.
DNS[1:0], sets the Digital Noise Suppression filter width, 00=no filter, 01=narow, 10=med, 11=wide.
Mode, sets Calibration mode. 0=Line mode, 1=Frame mode (not supported at this time).
Hold, used to stop calibration updates. 0=Calibration active. 1=stop, hold current Calibration values.
ManCal, used to manually program the Offset DACs. 0=automatic mode. 1=manual mode.
See the “Black Level Offset Calibration” section (pg. 19) for more information.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRD98L63AIVTR-F 制造商:Exar Corporation 功能描述:AFE General Purpose 1ADC 12-Bit 3V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XRD98L63AIVTR-F
XRD98L63EVAL 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 Eval Board for XRD98L63AIV RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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