參數(shù)資料
型號(hào)： XRD9836ACG
廠商： Exar Corporation
文件頁數(shù)： 8/32頁
文件大?。?/td> 0K
描述： IC 16B CCD/CIS SIG PROC 48TSSOP
產(chǎn)品變化通告： Leaded UART, V&I Obsolescence 11/Apr/2011
標(biāo)準(zhǔn)包裝： 39
位數(shù)： 16
通道數(shù)： 3
功率（瓦特）： 500mW
電壓 - 電源，模擬： 3 V ~ 3.6 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
封裝/外殼： 48-TSSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 48-TSSOP
包裝： 管件
XRD9836
xr
16-BIT PIXEL GAIN AFE
REV. 1.0.0
16
ALTERNATE PIXEL OFFSET ADJUST
MODE (APOAM):
In some applications, alternate pixels along a scan
line come from two different rows of CCD’s, causing a
systematic offset between alternate pixels. When the
XRD9836 is operated in the Fixed Gain Offset Mode
(FGOM), it does not have the ability to compensate
for this alternating offset phenomenon.
To compensate for these offsets, this chip has an Al-
ternate Pixel Offset Adjust mode (APOAM), which
can be enabled by writing a 1 to the APOAM bit (D1of
the MODE register) through the serial port. In
APOAM mode each channel has four 10-bit offset
registers to control offset. Odd pixel offsets are com-
pensated for by the Dynamic Offset Register value
and the Fine Offset Register value. The even pixel off-
sets are compensated for by the APOAM Dynamic
Offset Register value and the APOAM Fine Offset
Register value. The individual channel pixel gains do
not change and are determined by the red, green and
blue PGA gain register settings.
The offset alternates every other pixel. The first pixel
and all odd pixels in the line use the dynamic offset
and fine offset register values. The even pixels use
the APOAM dynamic offset and the APOAM fine off-
set register values. Odd pixels are defined from the
first ADCLK after the fall of LCLMP.
In the PPGOM mode, the APOAM can be selected
only when Input Enable (IE) is disabled. The last dy-
namic gain and offset programmed using the OGI
port are used for the odd pixels.
The APOAM dynamic offset and the APOAM fine reg-
ister values, programmed through the USIO port are
used for the even pixels. The gain value is fixed as the
last received value through the serial port. This is
shown in Figure 14.
Note: LCLMP also defines which pixel is even or odd.
The first pixel after LCLMP goes inactive is odd. Posi-
tion LCLMP so that there are an even number of pix-
els before start of active pixels.
FIGURE 13. APOAM MODE - CONFIGURATION OF OFF-
SET
REGISTERS
CDS Signal
NC
CDS
Dynamic
10
BIT
+
PGA
10 Bit
3:1
MUX
ADC
Offset
DAC
Fine
10
BIT
Offset
DAC
Dyn. Reg.
APOAM Dyn. Reg.
Fine Reg.
APOAM Fine Reg.
SUMMARY OF APOAM USABILITY:
MODE
IE
APOAM
FIXED GAIN/OFFSET
OFF
USABLE
FIXED GAIN/OFFSET
ON
USABLE
PIXEL GAIN/OFFSET
OFF
USABLE
PIXEL GAIN/OFFSET
ON
NOT USABLE
TABLE 1: SUMMARY OF APOAM USABILITY
Figure 14. APOAM SYNCHRONIZATION AND REGISTER
ALTERNATION
VSAMP
DYNAMIC
OFFSET
FINE
OFFSET
LCLMP
ODD
EVEN
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