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參數(shù)資料
型號: XR16V698IQ100-F
廠商: Exar Corporation
文件頁數(shù): 23/58頁
文件大小: 0K
描述: IC UART FIFO 32B OCTAL 100QFP
標準包裝: 66
特點: *
通道數(shù): 8
FIFO's: 32 字節(jié)
規(guī)程: RS485
電源電壓: 2.25 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 100-BQFP
供應商設(shè)備封裝: 100-QFP(14x20)
包裝: 托盤
XR16V698
3
REV. 1.0.3
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
PIN DESCRIPTIONS
NAME
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A7:A0
20-27
I
Address lines [7:0]. A0:A3 selects individual UART’s 16 configuration registers,
A4:A6 selects UART channel 0 to7, and A7 selects the global device configuration
registers.
D7:D0
5-12
IO
Data bus lines [7:0] (bidirectional).
IOR#
19
I
When 16/68# pin is HIGH, it selects Intel bus interface and this input is read strobe
(active LOW). The falling edge instigates an internal read cycle and retrieves the
data byte from an internal register pointed by the address lines [A7:A0], places it on
the data bus to allow the host processor to read it on the leading edge.
When 16/68# pin is LOW, it selects Motorola bus interface and this input should be
connected to VCC.
IOW#
(R/W#)
13
I
When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes write
strobe (active LOW). The falling edge instigates the internal write cycle and the
leading edge transfers the data byte on the data bus to an internal register pointed
by the address lines.
When 16/68# pin is LOW, it selects Motorola bus interface and this input becomes
read (HIGH) and write (LOW) signal (R/W#).
CS#
30
I
When 16/68# pin is HIGH, this input is chip select (active LOW) to enable the
XR16V698 device.
When 16/68# pin is LOW, this input becomes the read and write strobe (active
LOW) for the Motorola bus interface.
INT#
16
OD
Global interrupt output from XR16V698 (open drain, active LOW). This output
requires an external pull-up resistor (47K-100K ohms) to operate properly. It may be
shared with other devices in the system to form a single interrupt line to the host pro-
cessor and have the software driver polls each device for the interrupt status.
MODEM OR SERIAL I/O INTERFACE
TX0
93
O
UART channel 0 Transmit Data or infrared transmit data.
RX0
100
I
UART channel 0 Receive Data or infrared receive data. Normal RXD input idles
HIGH. The infrared pulse can be inverted internally prior to decoding by setting
FCTR bit-4.
RTS0#
95
O
UART channel 0 Request to Send or general purpose output (active LOW). This
port may be used for one of two functions:
1) Auto hardware flow control, see EFR bit-6, MCR bits-1 & 2, FCTR bits 0-3 and
IER bit-6
2) RS-485 half-duplex direction control, see FCTR bit-5, MCR bit-2 and MSR bits 0-
7.
CTS0#
99
I
UART channel 0 Clear to Send or general purpose input (active LOW). It can be
used for auto hardware flow control, see EFR bit-7, MCR bit-2 and IER bit-7.
DTR0#
94
O
UART channel 0 Data Terminal Ready or general purpose output (active LOW). This
port may be used forone of two functions.
1) auto hardware flow control, see EFR bit-6, FCTR bits-0 to 3, MCR bits-0 & 2, and
IER bit-6
2) RS-485 half-duplex direction control, see FCTR bit-5, MCR bit-2 and MSR bits 0-
7.
DSR0#
98
I
UART channel 0 Data Set Ready or general purpose input (active LOW). It can be
used for auto hardware flow control, see EFR bit-7, MCR bit-2 and IER bit-7.
CD0#
97
I
UART channel 0 Carrier Detect or general purpose input (active LOW).
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