參數(shù)資料
型號(hào): XR16C850IM
英文描述: UART|CMOS|TQFP|48PIN|PLASTIC
中文描述: 異步|的CMOS | TQFP封裝| 48PIN |塑料
文件頁數(shù): 1/49頁
文件大?。?/td> 690K
代理商: XR16C850IM
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
á
XR16C854/XR16C854D
3.3V AND 5V QUAD UART WITH 128-BYTE FIFO
APRIL 2002
REV. 2.0
GENERAL DESCRIPTION
The XR16C854/854D
1
(854) is an enhanced quad
Universal Asynchronous Receiver and Transmitter
(UART) each with 128 bytes of transmit and receive
FIFOs, transmit and receive FIFO counters and trig-
ger levels, automatic hardware and software flow con-
trol, and data rates of up to 2 Mbps. Each UART has
a set of registers that provide the user with operating
status and control, receiver error indications, and mo-
dem serial interface controls. Selectable interrupt po-
larity provides flexibility to meet design require-
ments. An internal loopback capability allows on-
board diagnostics. The 854 is available in 64
pinTQFP 68 pin PLCC, and 100 pin QFP packages.
The 64 pin package only offers the 16 mode interface,
but the 68 and 100 pin packages offer an additional
68 mode interface which allows easy integration with
Motorola processors. The XR16C854CV (64 pin) of-
fers
three
state
interrupt
XR16C854DV provides continuous interrupt output.
The 100 pin package provides additional FIFO status
outputs (TXRDY# and RXRDY# A-D), separate infra-
red transmit data outputs (IRTX A-D) and channel C
external clock input (CHCCLK). The XR16C854/
854D is compatible with the industry standard
ST16C554/554D and ST16C654/654D.
output
while
the
N
OTE
:
1 Covered by U.S. Patent #5,649,122.
FEATURES
Pin-to-pin compatible with the industry standard
ST16C554 and ST16C654 and TI’s TL16C554N
and TL16C754BFN
Intel or Motorola Data Bus Interface
Four independent UART channels
Register Set Compatible to 16C550
Data rates of up to 2 Mbps
Transmit and Receive FIFOs of 128 bytes
Programmable TX and RX FIFO Trigger Levels
Transmit and Receive FIFO Level Counters
Automatic Hardware (RTS/CTS) Flow Control
Selectable Auto RTS Flow Control Hysteresis
Automatic Software (Xon/Xoff) Flow Control
Wireless Infrared (IrDA 1.0) Encoder/Decoder
Full modem interface
3.3 V and 5.0 V supply operation
Sleep Mode (200 uA typical)
Crystal oscillator or external clock input
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
F
IGURE
1. XR16C854 B
LOCK
D
IAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
Data Bus
Interface
UART Channel A
128 Byte TX FIFO
UART
Regs
128 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
3.3V or 5V VCC
GND
854 BLK
TXB, RXB, IRTXB, DTRB#,
DSRB#, RTSB#, CTSB#,
CDB#, RIB#, OP2B#
UART Channel B
(same as Channel A)
A2:A0
D7:D0
IOR#
CSA#
CSB#
CSC#
CSD#
16/68#
INTSEL
INTA
INTB
INTC
INTD
IOW#
Reset
CHCCLK
TXRDY# A-D
RXRDY# A-D
UART Channel C
(same as Channel A)
TXA, RXA, IRTXA, DTRA#,
DSRA#, RTSA#, CTSA#,
CDA#, RIA#, OP2A#
TXC, RXC, IRTXC, DTRC#,
DSRC#, RTSC#, CTSC#,
CDC#, RIC#, OP2C#
UART Channel C
(same as Channel A)
TXD, RXD, IRTXD, DTRD#,
DSRD#, RTSD#, CTSD#,
CDD#, RID#, OP2D#
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