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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WEDPN16M72VR-XB2X
January 2005
Rev. 1
is dened as a signal cycling within timing constraints
specified for the clock pin) prior to CKE going back
HIGH. Once CKE is HIGH, the SDRAM must have NOP
commands issued (a minimum of two clocks) for tXSR,
because time is required for the completion of any internal
refresh in progress.
Upon exiting the self refresh mode, AUTO REFRESH
commands must be issued as both SELF REFRESH and
AUTO REFRESH utilize the row refresh counter.
* Self refresh available in commercial and industrial temperatures only.
ABSOLUTE MAXIMUM RATINGS
Parameter
Unit
Voltage on VCC, VCCQSupply relative to VSS
-1 to 4.6
V
Voltage on NC or I/O pins relative to VSS
-1 to 4.6
V
Operating Temperature TA (Mil)
-55 to +125
°C
Operating Temperature TA (Ind)
-40 to +85
°C
Storage Temperature, Plastic
-55 to +125
°C
NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions greater than those indicated in the
operational sections of this specication is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE (NOTE 2)
Parameter
Symbol Max
Unit
Input Capacitance: CLK
CI1
16
pF
Addresses, BA0-1 Input Capacitance
CA
7pF
Input Capacitance: All other input-only pins
CI2
8
pF
Input/Output Capacitance: I/Os
CIO
8
pF
Register Function LE/OE Capacitance
tREG
14
pF
BGA THERMAL RESISTANCE
Description
Symbol Max
Unit
Notes
Junction to Ambient (No Airow)
θJA
15.7
°C/W
1
Junction to Ball
θJB
11.2
°C/W
1
Junction to Case (Top)
θJC
6.2
°C/W
1
NOTE: Refer to Application Note “PBGA Thermal Resistance Correlation” at www.
whiteedc.com in the application notes section for modeling conditions.
DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (NOTES 1, 6)
VCC = +3.3V ±0.3V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
Symbol
Min
Max
Units
Supply Voltage
VCC
3
3.6
V
Input High Voltage: Logic 1; All inputs (21)
VIH
2VCC + 0.3
V
Input Low Voltage: Logic 0; All inputs (21)
VIL
-0.3
0.8
V
Input Leakage Current: Any input 0V VIN VCC (All other pins not under test = 0V)
II
-5
5
μA
Output Leakage Current: I/Os are disabled; 0V VOUT VCC
IOZ
-5
5
μA
Output Levels:
Output High Voltage (IOUT = -4mA)
Output Low Voltage (IOUT = 4mA)
VOH
2.4
–
V
VOL
–
0.4
V
IDD SPECIFICATIONS AND CONDITIONS (NOTES 1,6,11,13)
VCC = +3.3V ±0.3V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
Symbol
Max
Units
Operating Current: Active Mode;
Burst = 2; Read or Write; tRC = tRC (min); CAS latency = 3 (3, 18, 19)
ICC1
875
mA
Standby Current: Active Mode; CKE = HIGH; CS# = HIGH;
All banks active after tRCD met; No accesses in progress (3, 12, 19)
ICC3
300
mA
Operating Current: Burst Mode; Continuous burst;
Read or Write; All banks active; CAS latency = 3 (3, 18, 19)
ICC4
850
mA
Self Refresh Current: CKE 0.2V Commercial and Industrial temperature only (27, 28)
ICC7
12.5
mA