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參數(shù)資料
| 型號： | WED9LAPC2C16P8BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 4M X 32 SYNCHRONOUS DRAM, PBGA153 |
| 封裝： | 14 X 22 MM, BGA-153 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 693K |
| 代理商： | WED9LAPC2C16P8BI |
19
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED9LAPC2B16P8BC
November 2001
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
FIGURE 13 – SDRAM BURST READ SINGLE BIT WRITE CYCLE @ BURST LENGTH = 2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GCK
VCRAS#
VCCAS#
VCADDR
VCBS
VCADDR9/AP
VCDATA
VCWE#
VCDQM#
CL = 2
CL = 3
Row Active
(A-Bank)
Row Active
(B-Bank)
Row Active
(A-Bank)
Write
(A-Bank)
Read
(A-Bank)
Write with
Auto Precharge
(B-Bank)
Read with
Auto Precharge
(A-Bank)
Precharge
(Both Banks)
DON’T CARE
Note 2
RAa
CAa
CBc
CAd
RAc
RAa
DAa0
RBb
CAb
DBc0
RAc
QAd0
QAd1
QAd0
QAd1
DAa0
RBb
QAb0
QAb1
QAb0
QAb1
Notes:
1. BRSW modes enabled by setting A9 “High” at MRS (Mode Register Set).
At the BRSW Mode, the burst length at Write is xed to “1” regardless of programmed burst length.
2. When BRSW write command with auto precharge is executed, keep it in mind that tRAS should not be violated. Auto precharge is executed at the burst-end cycle, so in the
case of BRSW write command, the next cycle starts the precharge.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WED9LAPC2C16V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC2C16V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC3C16V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC3C16V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LC6416V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
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