參數(shù)資料
型號(hào)： VT83C469
廠商： Electronic Theatre Controls, Inc.
英文描述： PCMCIA Socket Controller
中文描述： PCMCIA插槽控制器
文件頁(yè)數(shù)： 24/36頁(yè)
文件大?。?/td> 156K
代理商： VT83C469
VIA Technologies, Inc.
Preliminary
VT83C469
24
B
US
T
YPE
S
IGNAL
D
ESCRIPTION
P
IN
T
YPE
I
D [15:0]
Card data
2, 4-10, 12, 13,
55-58, 60, 62,
73, 76-82, 84-
85, 126-130,
133
67
68
49, 120
I/O
I
I
S
HDACK#
HTC
INPACK#
HDACK: Host DMA Acknowledge
HTC: Host Terminal Count
Input acknowledge. Asserted by some PC Cards during I/O read
cycles. This signal is used by the VG-468 to control the enable
of its input data buffer between the card and CPU.
Interrupt Request output: Active low output requesting a
nonmaskable interrupt to the CPU. Also, a resistor strapping
input during RESETDRV to determine the mapping of socket A
and socket B to one of four groups.
I/O Channel Ready. This active high signal indicates that the
current I/O bus cycle has been completed. When a PC Card
needs to extend a Read or Write cycle, the VG-468 pulls
IOCHRDY low. IOCHRDY can be deasserted by either WAIT#,
or by programming to add wait states for 16-bit memory and I/O
cycles. If WAIT# is used in 16-bit mode, the wait state generator
has to be set to 1 wait state.
This active low I/O 16-bit chip select signal indicates to the host
system the current I/O cycle is a 16-bit access. A 16-bit to 8-bit
conversion is done if it is inactive.
I/O Read signal is driven active to read data from the PC Card's
I/O space. The REG# signal and at least one of the Card Enable
signals must also be active for the I/O transfer to take place.
I/O Write signal is driven active to write data to the PC Card's
I/O space. The REG# signal and at least one of the Card Enable
signals must also be active for the I/O transfer to take place.
IRQ [15, 14, 12:9, 7, 5:3]
I
I
I
S
INTR#
152
I/O
I
IOCHRDY
150
O
I
IOCS16#
148
O
I
IORD#
20, 91
O
I
IOWR#
22, 93
O
I
IRQs
136-140, 146-
142
181-175
O
I
LA [23:17]
Local Address bus used to address memory devices on the ISA-
bus. Together with the system address signals, they address up to
16MB on the ISA bus.
This active low 16-bit memory chip select signal indicates to the
host system that the current memory cycle is a 16-bit access
cycle. A 16-bit to 8-bit conversion is done if it is inactive.
Active low signal indicated a memory read cycle.
Active low signal indicates a memory write cycle.
Active low signal used to gate memory reads from memory cards.
I
I
MEMCS16#
149
O
I
I
S
MEMR#
MEMW#
OE#
174
174
16, 87
I
I
O
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