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參數(shù)資料
| 型號(hào)： | VSC8169 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | OC-48 (FEC) 16:1 SONET/SDH MUX with Clock Generator |
| 中文描述： | MUX/DEMUX, PQFP128 |
| 封裝： | 14 X 20 MM, HEAT SINK, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 191K |
| 代理商： | VSC8169 |
VITESSE
Preliminary Data Sheet
VSC8169
OC-48 (FEC) 16:1 SONET/SDH
MUX with Clock Generator
G52230-0, Rev 3.6
01/02/01
Page 7
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
AC Characteristics
Figure 9: Parallel Input Data and Clock Timing Waveform
Figure 10: Serial Data and Clock Output Phase Timing Waveform
t
DSU
t
DH
CLK16
PER
Valid Data 1
CLK16I+
Parallel Data Clock Input
TXIN[0:15]+, TXPRTYIN
Parallel Data Inputs
CLK16O+
Parallel Data Clock Output
= don't care
Valid Data 2
D15
MSB
LSB
Time
D14
D13
DO+
Differential Serial Data Output
CLKO+
Differential Clock Output
NOTE: Bit 15 (MSB) is received first, Bit 0 (LSB) is received last.
CLKO
PER
D1
D0
t
HOLD
t
SET
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