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參數(shù)資料
| 型號： | VSC8169 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | OC-48 (FEC) 16:1 SONET/SDH MUX with Clock Generator |
| 中文描述： | MUX/DEMUX, PQFP128 |
| 封裝： | 14 X 20 MM, HEAT SINK, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 191K |
| 代理商： | VSC8169 |
VITESSE
Preliminary Data Sheet
VSC8169
OC-48 (FEC) 16:1 SONET/SDH
MUX with Clock Generator
G52230-0, Rev 3.6
01/02/01
Page 13
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
35
NC
—
—
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
36
NC
—
—
37
NC
—
—
38
REF_FREQSEL
I
TTL
Reference clock input select
39
VCC
—
+3.3V
Positive power supply
40
VEE
—
GND
Negative power supply
41
FIFO_WARN
O
TTL
FIFO overflow warning
42
VEE
—
GND
Negative power supply
43
VCC
—
+3.3V
Positive power supply
44
RESET
I
TTL
Reset to align FIFO Write and Read pointers
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
No connect, leave unconnected
(1)
45
NC
—
—
46
NC
—
—
47
NC
—
—
48
NC
—
—
49
NC
—
—
50
VCC
—
+3.3V
Positive power supply
51
VEE
—
GND
Negative power supply
52
CLK16O+
O
LVPECL
Low-speed clock output, true. A divide-by-16 version of the PLL clock.
53
CLK16O-
O
LVPECL
Low-speed clock output, complement. A divide-by-16 version of the
PLL clock.
54
VCC
—
+3.3V
Positive power supply
55
CLKI+
I
LVPECL
Low-speed clock input for latching low-speed data, true
56
CLKI-
I
LVPECL
Low-speed clock input for latching low-speed data, complement
57
VEE
—
GND
Negative power supply
58
D0-
I
LVPECL
Low-speed differential parallel data
59
D0+
I
LVPECL
Low-speed differential parallel data
60
VCC
—
+3.3V
Positive power supply
61
D1-
I
LVPECL
Low-speed differential parallel data
62
D1+
I
LVPECL
Low-speed differential parallel data
No connect, leave unconnected
(1)
63
NC
—
—
64
VCC
—
+3.3V
Positive power supply
No connect, leave unconnected
(1)
65
NC
—
—
66
VCC
—
+3.3V
Positive power supply
67
D2-
I
LVPECL
Low-speed differential parallel data
68
D2+
I
LVPECL
Low-speed differential parallel data
Pin #
Name
I/O
Level
Description
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