參數(shù)資料
型號(hào)： VSC7212
廠商： Vitesse Semiconductor Corporation.
英文描述： Gigabit Interconnect Chip
中文描述： 千兆互連芯片
文件頁數(shù)： 15/34頁
文件大小： 504K
代理商： VSC7212
VITESSE
Preliminary Data Sheet
VSC7212
Gigabit Interconnect Chip
G52268-0, Rev 3.3
04/10/01
Page 15
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800)-VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Figure 10: State Diagram of the Invalid Transmission Counter
Link Status Outputs
On the receiver output bus, the
ERR
,
KCH
and
IDLE
outputs indicate status for the receiver as shown
below in Table 7. Since this status is encoded, multiple conditions could occur simultaneously so the states are
prioritized as indicated (1 being highest priority). For example, if both Out-of-Band and Disparity Errors occur,
only an Out-of-Band Error is reported because it has higher priority.
The
ERR
,
KCH
and
IDLE
status signals apply to the data on
R(7:0)
on a per-character basis. The only
exception to this is the Underrun/Overrun indication, which is asserted coincident with the duplicated character
when an underrun occurs, and is asserted following the deleted character (i.e. on the cycle where the deleted
character should have appeared) when an overrun occurs.
Table 7: Receiver Status Signals
ERR
KCH
IDLE
Priority
Link Status
0
0
0
7
Valid Data Transmission:
A valid 10B data character with correct
disparity was received. The correctly decoded version of this character is
on R(7:0).
Underrun/Overrun Error:
The elastic buffer has not been able to add/
drop an IDLE when required. Data on R(7:0) is invalid.
Kxx.x Special Character Detected (not IDLE):
A valid 10B special
character with correct disparity was received. The correctly decoded
version of this character, per Table 3, is on R(7:0).
IDLE Detected:
A valid IDLE character (K28.5) with correct disparity
was received. The correctly decoded version of this character, per Table 3,
is on R(7:0).
Out-of-band Error Detected
: A character was received which was not a
valid 10B data or control character. Data on R(7:0) is invalid.
Disparity Error Detected:
A valid 10B character was received which did
not have the expected disparity. R(7:0) is invalid.
Loss of Synchronization:
The receiver state machine is in the Loss-of-
Sync state. Data on R(7:0) is invalid.
RESYNC:
The receiver state machine is in the re-Synchronization state.
Data on R(7:0) is a decoded version of K28.1, K28.5 or K28.7.
0
0
1
1
0
1
0
6
0
1
1
5
1
0
0
3
1
0
1
4
1
1
0
2
1
1
1
2
(Unconditional)
Invalid
Valid
Invalid
Valid
Invalid
Valid
Invalid
Valid
0
1
2
3
4
Mis-Aligned
“
Comma
”
相關(guān)PDF資料
PDF描述
VSC7212RG Gigabit Interconnect Chip
VSC7216-01 Multi-Gigabit Interconnect Chip
VSC7216-02 740; 38000/740 Series; Microcontroller; Bit Size: 8-bit; ROM: 60K; RAM: 2048; ROM Type: Mask ROM; CPU: 740 core; Minimum Instruction Execution Time (ns): 240 (@16.8MHz); Operating Frequency / Supply Voltage: 1.8 to 5.5V; Operating Ambient Temperature (°C): -20 to 85; Package Code: PLQP0064GA-A (64P6U-A)
VSC7217 Multi-Gigabit Interconnect Chip
VSC7226 740; 38000/740 Series; Microcontroller; Bit Size: 8-bit; ROM: 60K; RAM: 2048; ROM Type: Mask ROM; CPU: 740 core; Minimum Instruction Execution Time (ns): 240 (@16.8MHz); Operating Frequency / Supply Voltage: 1.8 to 5.5V; Operating Ambient Temperature (°C): -20 to 85; Package Code: PRDP0064BA-A (64P4B)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VSC7212RG 制造商: 功能描述: 制造商:undefined 功能描述: 制造商:VITESSA 功能描述:
VSC7214QV11 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fiber-Optic Transceiver
VSC7214QV13 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fiber-Optic Transceiver
VSC7216-01 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:Multi-Gigabit Interconnect Chip
VSC7216-02 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:02 Low Power Quad 1.25Gb/s Backplane Transceiver
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*