參數(shù)資料
型號: VSC7177
廠商: Maxim Integrated Products, Inc.
英文描述: Enhanced 2:1 Port Selector for Serial ATA and Serial Attached SCSI
中文描述: 增強型2:1端口選擇器,用于串行ATA和串行連接SCSI
文件頁數(shù): 9/24頁
文件大?。?/td> 253K
代理商: VSC7177
9 of 24
Revision 4.2
July 29, 2005
Confidential
VSC7177
Data Sheet
COMRESET signals by an active host port are transmitted out of the device port even if the COMRESET signals are
a valid port selection signal. Refer to the Serial ATA II: Port Selector Revision 1.0
specification for a complete
definition of the port selection signals.
In the situation where a port selection signal is received when neither port is active (following a reset condition, for
example), the port receiving the signal becomes the active host port based on the first COMRESET series. All five
series of COMRESET signals are transmitted from the device port. A COMRESET signal is sent to the device in
response to the first COMRESET series and makes that port active. The remaining four series of COMRESET signals
are transmitted to the device because OOB signals are always transmitted once a host port has been connected to the
device port.
A COMRESET signal transmitted to a device causes the device to respond with a COMINIT signal. To prevent this
COMINIT signal from being squelched by the presence detection circuit’s COMWAKE transmission, the VSC7177
continuously transmits a COMRESET pattern to the device until the COMWAKE transmission is completed. This
guarantees the COMINIT signal from the device is propagated to the host.
Only OOB signals from an active host port are propagated to the device port. OOB signals from an inactive host port
are not propagated to the device port. If no active host port is selected, OOB signals received by the device port are
propagated to both host ports. When an active host port exists, OOB signals received by the device port are
propagated only to the active host port.
Data is transferred between the host and device ports without the use of PHYs. Power management, speed
negotiation, and spread spectrum clocking is indirectly supported by VSC7177 because data is merely passed through
the device.
Figure 3. Port Selection Signal
Valid COMSET Signals
t
1
t
2
t
1
t
2
Inter-reset
Assertion Delay
Minimum
Typical
Maximum
Unit
t
1
1.6
2.0
2.4
ms
t
2
7.6
8.0
8.4
ms
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