參數(shù)資料
型號: VP230
廠商: Texas Instruments, Inc.
元件分類: CAN
英文描述: 3.3-V CAN TRANSCEIVERS
中文描述: 3.3 V的CAN收發(fā)器
文件頁數(shù): 23/32頁
文件大小: 403K
代理商: VP230
www.ti.com
( )
INTEROPERABILITY WITH 5-V CAN SYSTEMS
It is essential that the 3.3-V HVD230 family performs seamlessly with 5-V transceivers because of the large
number of 5-V devices installed.
Figure 40
displays a test bus of a 3.3-V node with the HVD230, and three 5-V
nodes: one for each of TI's SN65LBC031 and UC5350 transceivers, and one using a competitor X250
transceiver.
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346H–MARCH 2001–REVISED JULY 2006
APPLICATION INFORMATION (continued)
10-k
resistor, and
500 ns with a 100-k
resistor. Therefore, considering that the rule-of-thumb propagation
delay of typical bus cable is 5 ns/m, slope control with the 100-k
resistor decreases the allowable bus length
by the difference between the 500-ns max loop delay and the loop delay with no slope control, 70.7 ns. This
equates to (500-70.7 ns)/5 ns, or approximately 86 m less bus length. This slew-rate/bus length trade-off to
reduce electromagnetic interference to adjoining circuits from the bus can also be solved with a quality shielded
bus cable.
Figure 39. 70.7-ns Loop Delay Through the HVD230 With R
S
= 0
23
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