參數(shù)資料
型號(hào)： VMS115
元件分類： 加密電路
英文描述： TELECOM, DATA ENCRYPTION CIRCUIT, PQFP100
封裝： MQFP-100
文件頁數(shù)： 7/64頁
文件大小： 572K
代理商： VMS115
VLSI Technology, a subsidiary of Philips Semiconductors
8/10/99
15
Revision: 2.3
906
Data Sheet
5.1.4.1
Opcode Register
5.1.4.1.1
Opcode Register Bit Definitions
Bits 31:16 Total length, in bytes, of packet - used to determine the end of packet. Minimum
packet size is 0 and maximum packet size is (216- 4).
Bits 15:9
Reserved
Bit 8
Hash No Pad
0 - Hash No Pad Off: Enables padding of the input data, hence the input data does
not need to be a multiple of 64 bytes. The IPAD and OPAD keys are not used in
this mode. Uses the Hash initial state constants.
1- Hash No Pad On: Disables padding of the input data, hence the input data must
be a multiple of 64 bytes. The IPAD and OPAD keys from the Context Write data
structure are used as the initialization state.
Bit 7
Enable HMAC - Enables the HMAC functionality to allow hashing with the
HMAC computation. When HMAC is enabled (bit=1) the Hash No Pad must be
disabled (Hash No Pad = 0).
0 - HMAC Disabled
1 - HMAC Enabled
Bit 6
Pre-DES/Post-DES - Indicates whether data is to be hashed before or after DES
processing.
0 - Pre DES Hashing: Hashing occurs before the DES operation.
1 - Post DES Hashing: Hashing occurs after the DES operation.
Bit 5
Hash Enable - Enables hashing without the HMAC computation. This bit is
ignored when the HMAC functionality is enabled (Bit 7 = 1).
0 - Hash Disabled
1 - Hash Enabled
Opcode Register Configuration
31
30
29
28
27
26
25
24
Total Length of Packet (Bytes)
23
22
21
20
19
18
17
16
Total Length of Packet (Bytes)
15
14
13
12
11
10
9
8
Reserved
Hash No
Pad
7
6
5
4
3
2
1
0
Enable
HMAC
Post-DES/
Pre-DES
Hash
Enable
DES
Enable
MD5/
SHA-1
CBC/ECB
Encrypt/
Decrypt
3DES/DES
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