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VFC100
3
SPECIFICATIONS
(CONT)
At T
A
= +25
°
C and
±
15VDC supplies, unless otherwise noted.
VFC100AG
VFC100BG
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
POWER SUPPLY
Rated Voltage
Operating Voltage Range
(See Figure 9)
±
15
6
V
+V
CC
–V
+7.5
–7.5
15
+28.5
–28.5
36
+V
CC
– 4
15
15
6
6
6
6
6
6
6
6
6
6
V
V
V
V
Total Supply
Digital Common
Quiescent Current: +I
CC
+V
CC
– (–V
CC
)
–V
CC
+ 2
Over Temperature
10.6
9.6
6
6
mA
mA
–I
CC
TEMPERATURE RANGE
Specification
Storage
θ
JA
θ
JC
–25
–65
+85
+150
6
6
6
6
°
C
°
C
150
100
6
6
°
C/W
°
C/W
6
Specification same as AG grade.
NOTES: (1) Offset and gain error can be trimmed to zero. See text. (2) Specified by the box method: (max. – min.)
÷
(FSR x
T). (3) Refer to detailed timing diagram
in Figure 16 for frequency input signal timing requirements. (4) FSR = Full Scale Range. (5) Pin 9 connected to +V
CC
. (6) Nominal PW
OUT
= (5ns/pF) x C
OS
– 90ns.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage (+V
CC
to –V
CC
) ............................................... 36V
+V
CC
to Analog Common .....................................................................28V
–V
to Analog Common .....................................................................28V
Integrator Out Short-Circuit to Ground ........................................Indefinite
Integrator Differential Input ................................................................
±
10V
Integrator Common-Mode Input .................................... –V
+5V to +2V
V
(pin 7) .........................................................................................
±
V
CC
Clock Input .........................................................................................
±
V
CC
V
REF
Out Short-Circuit to Ground ................................................Indefinite
Pin 9 (C
) .................................................................................0 to +V
CC
f
(referred to digital common).......................................... –0.5V to 36V
Digital Common .................................................................................
±
V
CC
Storage Temperature Range ..........................................–65
°
C to +150
°
C
Lead Temperature (soldering, 10s) ................................................. 300
°
C
PIN CONFIGURATION
NC
NC
Integrator Out
Noninverting In
V
+ Comparator In
– Comparator In
Analog Common
Digital Common
f
Clock Input
C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
+V
CC
C
INT
V
IN
–V
CC
OUT
OS
Top View
DIP
PACKAGE INFORMATION
PACKAGE DRAWING
NUMBER
(1)
PRODUCT
PACKAGE
VFC100AG
VFC100BG
16-Pin Ceramic DIP
16-Pin Ceramic DIP
129
129
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.